[arch] Add Arch::isGlobalNet() API too

This commit is contained in:
Eddie Hung 2019-01-27 12:36:05 -08:00
parent f1a735cf3e
commit b01f012e86
6 changed files with 25 additions and 4 deletions

View File

@ -433,7 +433,7 @@ Run the placer.
### bool route()
run the router.
Run the router.
Graphics Methods
----------------
@ -481,6 +481,13 @@ Return the _clocking info_ (including port name of clock, clock polarity and set
port. Where ports have more than one clock edge associated with them (such as DDR outputs), `index` can be used to obtain
information for all edges. `index` must be in [0, clockInfoCount), behaviour is undefined otherwise.
Net Methods
------------------
### bool isGlobalNet(const NetInfo *net) const
Returns true if the given net is driven by a global buffer.
Placer Methods
--------------
@ -492,5 +499,5 @@ a certain number of different clock signals allowed for a group of bels.
### bool isBelLocationValid(BelId bel) const
Returns true if a bell in the current configuration is valid, i.e. if
Returns true if a bel in the current configuration is valid, i.e. if
`isValidBelForCell()` would return true for the current mapping.

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@ -768,6 +768,13 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
return info;
}
bool Arch::isGlobalNet(const NetInfo *net) const
{
if (net == nullptr)
return false;
return net->driver.cell != nullptr && net->driver.port == id_CLKO;
}
std::vector<std::pair<std::string, std::string>> Arch::getTilesAtLocation(int row, int col)
{
std::vector<std::pair<std::string, std::string>> ret;

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@ -955,7 +955,7 @@ struct Arch : BaseCtx
TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const;
// Get the TimingClockingInfo of a port
TimingClockingInfo getPortClockingInfo(const CellInfo *cell, IdString port, int index) const;
// Return true if a port is a net
// Return true if net is driven from global buffer
bool isGlobalNet(const NetInfo *net) const;
bool getDelayFromTimingDatabase(IdString tctype, IdString from, IdString to, DelayInfo &delay) const;

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@ -474,6 +474,11 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
NPNR_ASSERT_FALSE("no clocking info for generic");
}
bool Arch::isGlobalNet(const NetInfo *net) const
{
return false;
}
bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const { return true; }
bool Arch::isBelLocationValid(BelId bel) const { return true; }

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@ -238,6 +238,8 @@ struct Arch : BaseCtx
TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const;
// Get the TimingClockingInfo of a port
TimingClockingInfo getPortClockingInfo(const CellInfo *cell, IdString port, int index) const;
// Return true if net is driven from global buffer
bool isGlobalNet(const NetInfo *net) const;
bool isValidBelForCell(CellInfo *cell, BelId bel) const;
bool isBelLocationValid(BelId bel) const;

View File

@ -851,7 +851,7 @@ struct Arch : BaseCtx
TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const;
// Get the TimingClockingInfo of a port
TimingClockingInfo getPortClockingInfo(const CellInfo *cell, IdString port, int index) const;
// Return true if a port is a net
// Return true if net is driven from global buffer
bool isGlobalNet(const NetInfo *net) const;
// -------------------------------------------------