Add bitgen for the rest of XO2 and XO3
This commit is contained in:
Miodrag Milanovic
myrtle
parent
89c71bc8ac
commit
b033b915a6
@ -30,6 +30,27 @@ NEXTPNR_NAMESPACE_BEGIN
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// These seem simple enough to do inline for now.
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namespace BaseConfigs {
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void config_empty_lcmxo2_256(ChipConfig &cc)
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{
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cc.tiles["PT1:CFG0_ENDL"].add_unknown(5, 41);
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cc.tiles["PT1:CFG0_ENDL"].add_unknown(5, 43);
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cc.tiles["PT1:CFG0_ENDL"].add_unknown(5, 47);
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cc.tiles["PT4:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo2_640(ChipConfig &cc)
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{
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cc.tiles["EBR_R0C14:EBR1_640"].add_unknown(0, 12);
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cc.tiles["EBR_R0C17:EBR1_640"].add_unknown(0, 12);
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cc.tiles["PT1:CFG0_ENDL"].add_unknown(5, 41);
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cc.tiles["PT1:CFG0_ENDL"].add_unknown(5, 43);
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cc.tiles["PT1:CFG0_ENDL"].add_unknown(5, 47);
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cc.tiles["PT4:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo2_1200(ChipConfig &cc)
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{
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cc.tiles["EBR_R6C2:EBR1"].add_unknown(0, 12);
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@ -47,13 +68,144 @@ void config_empty_lcmxo2_1200(ChipConfig &cc)
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo2_2000(ChipConfig &cc)
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{
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cc.tiles["EBR_R8C3:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C6:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C9:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C12:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C16:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C19:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C22:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C25:EBR1"].add_unknown(0, 12);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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cc.tiles["PT4:CFG0"].add_unknown(5, 36);
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo2_4000(ChipConfig &cc)
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{
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cc.tiles["EBR_R11C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C5:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C8:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C11:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C14:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C19:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C22:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C25:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C28:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C31:EBR1"].add_unknown(0, 12);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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cc.tiles["PT4:CFG0"].add_unknown(5, 36);
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo2_7000(ChipConfig &cc)
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{
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cc.tiles["EBR_R13C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C5:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C8:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C11:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C14:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C17:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C22:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C25:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C28:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C31:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C34:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C37:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C40:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C5:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C8:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C11:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C14:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C17:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C22:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C25:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C28:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C31:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C34:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C37:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C40:EBR1"].add_unknown(0, 12);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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cc.tiles["PT4:CFG0"].add_unknown(5, 36);
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo3_1300(ChipConfig &cc)
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{
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cc.tiles["EBR_R6C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R6C5:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R6C8:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R6C11:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R6C15:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R6C18:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R6C21:EBR1"].add_unknown(0, 12);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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cc.tiles["PT4:CFG0"].add_unknown(5, 36);
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo3_2100(ChipConfig &cc)
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{
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cc.tiles["EBR_R8C3:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C6:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C9:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C12:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C16:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C19:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C22:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C25:EBR1"].add_unknown(0, 12);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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cc.tiles["PT4:CFG0"].add_unknown(5, 36);
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo3_4300(ChipConfig &cc)
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{
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cc.tiles["EBR_R11C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C5:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C8:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C11:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C14:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C19:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C22:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C25:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C28:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R11C31:EBR1"].add_unknown(0, 12);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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cc.tiles["PT4:CFG0"].add_unknown(5, 36);
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo3_6900(ChipConfig &cc)
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{
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// TODO: This block is probably clock routing
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cc.tiles["CENTER20:CENTER_EBR_CIB_SP"].add_unknown(23, 1);
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cc.tiles["CIB_R20C36:CIB_EBR0"].add_unknown(26, 30);
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cc.tiles["CIB_R20C40:CIB_EBR1"].add_unknown(26, 30);
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cc.tiles["PR16:PIC_R1"].add_unknown(16, 52);
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cc.tiles["EBR_R13C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R13C5:EBR1"].add_unknown(0, 12);
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@ -83,7 +235,65 @@ void config_empty_lcmxo3_6900(ChipConfig &cc)
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cc.tiles["EBR_R20C37:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R20C40:EBR1"].add_unknown(0, 12);
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cc.tiles["PR16:PIC_R1"].add_unknown(16, 52);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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cc.tiles["PT4:CFG0"].add_unknown(5, 36);
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cc.tiles["PT7:CFG3"].add_unknown(5, 18);
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}
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void config_empty_lcmxo3_9400(ChipConfig &cc)
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{
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cc.tiles["EBR_R15C2:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C5:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C8:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C11:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C14:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C17:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C20:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C23:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C27:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C30:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C33:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C36:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C39:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C42:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C45:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R15C48:EBR1_10K"].add_unknown(0, 12);
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cc.tiles["EBR_R8C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C5:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C8:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C11:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C14:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C17:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C20:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C23:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C27:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C30:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C33:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C36:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C39:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C42:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C45:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R8C48:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C2:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C5:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C8:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C11:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C14:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C17:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C20:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C23:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C27:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C30:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C33:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C36:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C39:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C42:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C45:EBR1"].add_unknown(0, 12);
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cc.tiles["EBR_R22C48:EBR1"].add_unknown(0, 12);
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cc.tiles["PT4:CFG0"].add_unknown(5, 30);
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cc.tiles["PT4:CFG0"].add_unknown(5, 32);
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@ -246,11 +456,28 @@ void write_bitstream(Context *ctx, std::string text_config_file)
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{
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ChipConfig cc;
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IdString base_id = ctx->id(ctx->chip_info->device_name.get());
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// IdString device_id = ctx->id(ctx->device_name);
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if (base_id == ctx->id("LCMXO2-1200"))
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if (base_id == ctx->id("LCMXO2-256"))
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BaseConfigs::config_empty_lcmxo2_256(cc);
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else if (base_id == ctx->id("LCMXO2-640"))
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BaseConfigs::config_empty_lcmxo2_640(cc);
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else if (base_id == ctx->id("LCMXO2-1200"))
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BaseConfigs::config_empty_lcmxo2_1200(cc);
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else if (base_id == ctx->id("LCMXO2-2000"))
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BaseConfigs::config_empty_lcmxo2_2000(cc);
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else if (base_id == ctx->id("LCMXO2-4000"))
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BaseConfigs::config_empty_lcmxo2_4000(cc);
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else if (base_id == ctx->id("LCMXO2-7000"))
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BaseConfigs::config_empty_lcmxo2_7000(cc);
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else if (base_id == ctx->id("LCMXO3-1300"))
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BaseConfigs::config_empty_lcmxo3_1300(cc);
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else if (base_id == ctx->id("LCMXO3-2100"))
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BaseConfigs::config_empty_lcmxo3_2100(cc);
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else if (base_id == ctx->id("LCMXO3-4300") || base_id == ctx->id("LCMXO3D-4300"))
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BaseConfigs::config_empty_lcmxo3_4300(cc);
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else if (base_id == ctx->id("LCMXO3-6900"))
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BaseConfigs::config_empty_lcmxo3_6900(cc);
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else if (base_id == ctx->id("LCMXO3-9400") || base_id == ctx->id("LCMXO3D-9400"))
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BaseConfigs::config_empty_lcmxo3_9400(cc);
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else
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NPNR_ASSERT_FALSE("Unsupported device type");
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cc.chip_name = ctx->chip_info->device_name.get();
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@ -258,6 +485,15 @@ void write_bitstream(Context *ctx, std::string text_config_file)
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cc.metadata.push_back("Part: " + ctx->getChipName());
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if (cc.chip_variant.find("LCMXO3L-") != std::string::npos) {
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// XO3L have this set but not XO3LF
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cc.tiles["PT5:CFG1"].add_unknown(5, 36);
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}
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if (cc.chip_variant.find("LCMXO3D-") != std::string::npos) {
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cc.tiles["PT5:CFG1"].add_unknown(5, 36);
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cc.tiles["PT6:CFG2"].add_unknown(5, 37);
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}
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// Add all set, configurable pips to the config
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for (auto pip : ctx->getPips()) {
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if (ctx->getBoundPipNet(pip) != nullptr) {
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