From b1b81839677aa2ee2b7b0b3cff60f20dda95476e Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 2 Dec 2018 15:41:03 -0800 Subject: [PATCH] Re-enable PLL in attosoc.v --- xc7/attosoc_top.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xc7/attosoc_top.v b/xc7/attosoc_top.v index 5611f1d2..b794abda 100644 --- a/xc7/attosoc_top.v +++ b/xc7/attosoc_top.v @@ -7,8 +7,8 @@ module top ( wire led_unused; wire gclk; - //clk_wiz_v3_6 pll(.CLK_IN1(clk), .CLK_OUT1(gclk)); - assign gclk = clk; + clk_wiz_v3_6 pll(.CLK_IN1(clk), .CLK_OUT1(gclk)); + //assign gclk = clk; attosoc soc(.clk(gclk), .led({led_unused, led})); endmodule