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update doc - UNTESTED on real hardware

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kittennbfive 2020-09-28 14:49:35 +00:00 committed by GitHub
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docs/constraints.md
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@ -9,11 +9,18 @@ The iCE40 architecture supports PCF constraints thus:
set_io led[0] 3 set_io led[0] 3
and the ECP5 architecture supports a subset of LPF constraints: and the ECP5 architecture supports a subset of LPF constraints (for details see Lattice Technical Note "FPGA-TN-02032 1.3"):
LOCATE COMP "led[0]" SITE "E16"; LOCATE COMP "led[0]" SITE "E16";
IOBUF PORT "led[0]" IO_TYPE=LVCMOS25; IOBUF PORT "led[0]" IO_TYPE=LVCMOS25;
IOBUF ... DRIVE=8;
IOBUF ... OPENDRAIN=ON|OFF;
IOBUF ... TERMINATION=50;
IOBUF ... DIFFRESISTOR=100; //for differential IO only
IOBUF ... CLAMP=ON|OFF;
IOBUF ... PULLMODE=UP|DOWN|NONE;
IOBUF ... SLEWRATE=FAST|SLOW; //outputs only
IOBUF ... HYSTERESIS=ON|OFF;
## Absolute Placement Constraints ## Absolute Placement Constraints