update doc - UNTESTED on real hardware
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@ -9,11 +9,18 @@ The iCE40 architecture supports PCF constraints thus:
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set_io led[0] 3
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and the ECP5 architecture supports a subset of LPF constraints:
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and the ECP5 architecture supports a subset of LPF constraints (for details see Lattice Technical Note "FPGA-TN-02032 1.3"):
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LOCATE COMP "led[0]" SITE "E16";
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IOBUF PORT "led[0]" IO_TYPE=LVCMOS25;
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IOBUF ... DRIVE=8;
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IOBUF ... OPENDRAIN=ON|OFF;
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IOBUF ... TERMINATION=50;
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IOBUF ... DIFFRESISTOR=100; //for differential IO only
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IOBUF ... CLAMP=ON|OFF;
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IOBUF ... PULLMODE=UP|DOWN|NONE;
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IOBUF ... SLEWRATE=FAST|SLOW; //outputs only
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IOBUF ... HYSTERESIS=ON|OFF;
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## Absolute Placement Constraints
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