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Rename ArchBase to BaseArch for consistency with BaseCtx

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Signed-off-by: D. Shah <dave@ds0.me>
This commit is contained in:
D. Shah 2021-02-04 12:07:11 +00:00
parent 297cd026b9
commit b4227f586c
3 changed files with 7 additions and 7 deletions
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2
common/nextpnr.h
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@ -1064,7 +1064,7 @@ typename std::enable_if<!std::is_same<Tret, Tc>::value, Tret>::type return_if_ma
} // namespace
template <typename R> struct ArchBase : BaseCtx
template <typename R> struct BaseArch : BaseCtx
{
// --------------------------------------------------------------
// Arch API base

4
ecp5/arch.cc
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@ -105,8 +105,8 @@ Arch::Arch(ArchArgs args) : args(args)
bel_to_cell.resize(chip_info->height * chip_info->width * max_loc_bels, nullptr);
ArchBase::init_cell_types();
ArchBase::init_bel_buckets();
BaseArch::init_cell_types();
BaseArch::init_bel_buckets();
for (int i = 0; i < chip_info->width; i++)
x_ids.push_back(id(stringf("X%d", i)));

8
ecp5/arch.h
View File

@ -465,7 +465,7 @@ struct ArchRanges
using BucketBelRange = const std::vector<BelId> &;
};
struct Arch : ArchBase<ArchRanges>
struct Arch : BaseArch<ArchRanges>
{
const ChipInfoPOD *chip_info;
const PackageInfoPOD *package_info;
@ -654,7 +654,7 @@ struct Arch : ArchBase<ArchRanges>
if (pip != PipId()) {
wire_fanout[getPipSrcWire(pip)]--;
}
ArchBase::unbindWire(wire);
BaseArch::unbindWire(wire);
}
DelayInfo getWireDelay(WireId wire) const override
@ -703,13 +703,13 @@ struct Arch : ArchBase<ArchRanges>
void bindPip(PipId pip, NetInfo *net, PlaceStrength strength) override
{
wire_fanout[getPipSrcWire(pip)]++;
ArchBase::bindPip(pip, net, strength);
BaseArch::bindPip(pip, net, strength);
}
void unbindPip(PipId pip) override
{
wire_fanout[getPipSrcWire(pip)]--;
ArchBase::unbindPip(pip);
BaseArch::unbindPip(pip);
}
AllPipRange getPips() const override