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ecp5: Speedup placement using ArchCellInfo

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Signed-off-by: David Shah <davey1576@gmail.com>
This commit is contained in:
David Shah 2018-08-18 18:14:18 +01:00
parent 5fe29922fd
commit b8206d71ca
4 changed files with 42 additions and 12 deletions
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2
ecp5/arch.h
View File

@ -848,6 +848,8 @@ struct Arch : BaseCtx
// Helper function for above
bool slicesCompatible(const std::vector<const CellInfo *> &cells) const;
void assignArchInfo();
std::vector<std::pair<std::string, std::string>> getTilesAtLocation(int row, int col);
std::string getTileByTypeAndLocation(int row, int col, std::string type) const
{

24
ecp5/arch_place.cc
View File

@ -35,26 +35,26 @@ bool Arch::slicesCompatible(const std::vector<const CellInfo *> &cells) const
{
// TODO: allow different LSR/CLK and MUX/SRMODE settings once
// routing details are worked out
NetInfo *clk_sig = nullptr, *lsr_sig = nullptr;
std::string CLKMUX, LSRMUX, SRMODE;
IdString clk_sig, lsr_sig;
IdString CLKMUX, LSRMUX, SRMODE;
bool first = true;
for (auto cell : cells) {
if (first) {
clk_sig = port_or_nullptr(cell, id_CLK);
lsr_sig = port_or_nullptr(cell, id_LSR);
CLKMUX = str_or_default(cell->params, id_CLKMUX, "CLK");
LSRMUX = str_or_default(cell->params, id_LSRMUX, "LSR");
SRMODE = str_or_default(cell->params, id_SRMODE, "CE_OVER_LSR");
clk_sig = cell->sliceInfo.clk_sig;
lsr_sig = cell->sliceInfo.lsr_sig;
CLKMUX = cell->sliceInfo.clkmux;
LSRMUX = cell->sliceInfo.lsrmux;
SRMODE = cell->sliceInfo.srmode;
} else {
if (port_or_nullptr(cell, id_CLK) != clk_sig)
if (cell->sliceInfo.clk_sig != clk_sig)
return false;
if (port_or_nullptr(cell, id_LSR) != lsr_sig)
if (cell->sliceInfo.lsr_sig != lsr_sig)
return false;
if (str_or_default(cell->params, id_CLKMUX, "CLK") != CLKMUX)
if (cell->sliceInfo.clkmux != CLKMUX)
return false;
if (str_or_default(cell->params, id_LSRMUX, "LSR") != LSRMUX)
if (cell->sliceInfo.lsrmux != LSRMUX)
return false;
if (str_or_default(cell->params, id_SRMODE, "CE_OVER_LSR") != SRMODE)
if (cell->sliceInfo.srmode != SRMODE)
return false;
}
first = false;

4
ecp5/archdefs.h
View File

@ -139,6 +139,10 @@ struct ArchNetInfo
};
struct ArchCellInfo
{
struct
{
IdString clk_sig, lsr_sig, clkmux, lsrmux, srmode;
} sliceInfo;
};
NEXTPNR_NAMESPACE_END

24
ecp5/pack.cc
View File

@ -536,10 +536,34 @@ bool Arch::pack()
log_break();
Ecp5Packer(ctx).pack();
log_info("Checksum: 0x%08x\n", ctx->checksum());
assignArchInfo();
return true;
} catch (log_execution_error_exception) {
assignArchInfo();
return false;
}
}
void Arch::assignArchInfo()
{
for (auto cell : sorted(cells)) {
CellInfo *ci = cell.second;
if (ci->type == id_TRELLIS_SLICE) {
if (ci->ports.count(id_CLK) && ci->ports[id_CLK].net != nullptr)
ci->sliceInfo.clk_sig = ci->ports[id_CLK].net->name;
else
ci->sliceInfo.clk_sig = IdString();
if (ci->ports.count(id_LSR) && ci->ports[id_LSR].net != nullptr)
ci->sliceInfo.lsr_sig = ci->ports[id_LSR].net->name;
else
ci->sliceInfo.lsr_sig = IdString();
ci->sliceInfo.clkmux = id(str_or_default(ci->params, id_CLKMUX, "CLK"));
ci->sliceInfo.lsrmux = id(str_or_default(ci->params, id_LSRMUX, "LSR"));
ci->sliceInfo.srmode = id(str_or_default(ci->params, id_SRMODE, "LSR_OVER_CE"));
}
}
}
NEXTPNR_NAMESPACE_END