couple of functions implemented
This commit is contained in:
Dan Ravensloft
gatecat
parent
6ffbb9ed87
commit
b8f58d558c
@ -1,7 +1,7 @@
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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2020 Lofty <dan.ravensloft@gmail.com
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* Copyright (C) 2021 Lofty <dan.ravensloft@gmail.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@ -14,5 +14,82 @@
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <algorithm>
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#include "nextpnr.h"
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#include "mistral/lib/cyclonev.h"
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NEXTPNR_NAMESPACE_BEGIN
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using mistral::CycloneV;
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Arch::Arch(ArchArgs args)
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{
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this->args = args;
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this->cyclonev = mistral::CycloneV::get_model(args.device);
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NPNR_ASSERT(this->cyclonev != nullptr);
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}
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int Arch::getTileBelDimZ(int x, int y) const
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{
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CycloneV::pos_t pos = cyclonev->xy2pos(x, y);
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for (CycloneV::block_type_t bel : cyclonev->pos_get_bels(pos)) {
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switch (bel) {
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case CycloneV::block_type_t::LAB:
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/*
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* nextpnr and mistral disagree on what a BEL is: mistral thinks an entire LAB
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* is one BEL, but nextpnr wants something with more precision.
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*
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* One LAB contains 10 ALMs.
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* One ALM contains 2 LUT outputs and 4 flop outputs.
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*/
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return 60;
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case CycloneV::block_type_t::GPIO:
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// GPIO tiles contain 4 pins.
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return 4;
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default:
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continue;
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}
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}
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// As a temporary hack, only LABs and IO are allowed to be placed, so every other tile type has zero BELs.
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return 0;
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}
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BelId Arch::getBelByName(IdString name) const
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{
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char bel_type_str[80] = {0};
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int x = 0, y = 0, z = 0;
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BelId bel;
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sscanf(name.c_str(this), "%s.%d.%d.%d", bel_type_str, &x, &y, &z);
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auto bel_type = cyclonev->block_type_lookup(std::string{bel_type_str});
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bel.pos = CycloneV::xy2pos(x, y);
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bel.z = (bel_type << 8) | z;
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return bel;
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}
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IdString Arch::getBelName(BelId bel) const
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{
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char bel_str[80] = {0};
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int x = CycloneV::pos2x(bel.pos);
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int y = CycloneV::pos2y(bel.pos);
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int z = bel.pos & 0xFF;
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int bel_type = bel.z >> 8;
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snprintf(bel_str, 80, "%s.%03d.%03d.%03d", cyclonev->block_type_names[bel_type], x, y, z);
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return id(bel_str);
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}
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NEXTPNR_NAMESPACE_END
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218
cyclonev/arch.h
218
cyclonev/arch.h
@ -1,7 +1,7 @@
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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2020 Lofty <dan.ravensloft@gmail.com>
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* Copyright (C) 2021 Lofty <dan.ravensloft@gmail.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@ -21,265 +21,95 @@
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#error Include "arch.h" via "nextpnr.h" only.
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#endif
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#include "mistral/lib/cyclonev.h"
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NEXTPNR_NAMESPACE_BEGIN
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struct BelIterator
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{
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int cursor;
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BelIterator operator++()
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{
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cursor++;
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return *this;
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}
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BelIterator operator++(int)
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{
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BelIterator prior(*this);
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cursor++;
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return prior;
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}
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bool operator!=(const BelIterator &other) const { return cursor != other.cursor; }
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bool operator==(const BelIterator &other) const { return cursor == other.cursor; }
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BelId operator*() const
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{
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BelId ret;
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ret.index = cursor;
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return ret;
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}
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};
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struct BelRange
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{
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BelIterator b, e;
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BelIterator begin() const { return b; }
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BelIterator end() const { return e; }
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};
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// -----------------------------------------------------------------------
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struct BelPinIterator
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{
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const /* something */ int *ptr = nullptr;
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void operator++() { ptr++; }
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bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; }
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BelPin operator*() const
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{
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BelPin ret;
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return ret;
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}
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};
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struct BelPinRange
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{
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BelPinIterator b, e;
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BelPinIterator begin() const { return b; }
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BelPinIterator end() const { return e; }
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};
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// -----------------------------------------------------------------------
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struct WireIterator
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{
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int cursor = -1;
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void operator++() { cursor++; }
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bool operator!=(const WireIterator &other) const { return cursor != other.cursor; }
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WireId operator*() const
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{
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WireId ret;
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ret.index = cursor;
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return ret;
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}
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};
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struct WireRange
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{
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WireIterator b, e;
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WireIterator begin() const { return b; }
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WireIterator end() const { return e; }
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};
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// -----------------------------------------------------------------------
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struct AllPipIterator
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{
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int cursor = -1;
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void operator++() { cursor++; }
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bool operator!=(const AllPipIterator &other) const { return cursor != other.cursor; }
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PipId operator*() const
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{
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PipId ret;
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ret.index = cursor;
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return ret;
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}
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};
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struct AllPipRange
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{
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AllPipIterator b, e;
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AllPipIterator begin() const { return b; }
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AllPipIterator end() const { return e; }
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};
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// -----------------------------------------------------------------------
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struct PipIterator
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{
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const int *cursor = nullptr;
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void operator++() { cursor++; }
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bool operator!=(const PipIterator &other) const { return cursor != other.cursor; }
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PipId operator*() const
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{
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PipId ret;
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ret.index = *cursor;
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return ret;
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}
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};
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struct PipRange
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{
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PipIterator b, e;
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PipIterator begin() const { return b; }
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PipIterator end() const { return e; }
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};
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struct ArchArgs
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{
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std::string device;
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};
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struct Arch : BaseCtx
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{
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ArchArgs args;
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mistral::CycloneV* cyclonev;
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Arch(ArchArgs args);
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std::string getChipName() const;
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std::string getChipName() const { return std::string{"TODO: getChipName"}; }
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IdString archId() const { return id("cyclonev"); }
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ArchArgs archArgs() const;
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IdString archArgsToId(ArchArgs args) const;
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ArchArgs archArgs() const { return args; }
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IdString archArgsToId(ArchArgs args) const { return id("TODO: archArgsToId"); }
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// -------------------------------------------------
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int getGridDimX() const;
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int getGridDimY() const;
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int getTileBelDimZ(int, int) const;
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int getTilePipDimZ(int, int) const;
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int getGridDimX() const { return cyclonev->get_tile_sx(); }
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int getGridDimY() const { return cyclonev->get_tile_sy(); }
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int getTileBelDimZ(int x, int y) const; // arch.cc
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int getTilePipDimZ(int x, int y) const { return 1; }
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// -------------------------------------------------
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BelId getBelByName(IdString name) const;
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IdString getBelName(BelId bel) const;
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uint32_t getBelChecksum(BelId bel) const;
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BelId getBelByName(IdString name) const; // arch.cc
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IdString getBelName(BelId bel) const; // arch.cc
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uint32_t getBelChecksum(BelId bel) const { return (bel.pos << 16) | bel.z; }
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void bindBel(BelId bel, CellInfo *cell, PlaceStrength strength);
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void unbindBel(BelId bel);
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bool checkBelAvail(BelId bel) const;
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CellInfo *getBoundBelCell(BelId bel) const;
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CellInfo *getConflictingBelCell(BelId bel) const;
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BelRange getBels() const;
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const std::vector<BelId> &getBels() const;
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Loc getBelLocation(BelId bel) const;
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BelId getBelByLocation(Loc loc) const;
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BelRange getBelsByTile(int x, int y) const;
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const std::vector<BelId> &getBelsByTile(int x, int y) const;
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bool getBelGlobalBuf(BelId bel) const;
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IdString getBelType(BelId bel) const;
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std::vector<std::pair<IdString, std::string>> getBelAttrs(BelId bel) const;
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WireId getBelPinWire(BelId bel, IdString pin) const;
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PortType getBelPinType(BelId bel, IdString pin) const;
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std::vector<IdString> getBelPins(BelId bel) const;
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bool isBelLocked(BelId bel) const;
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// -------------------------------------------------
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WireId getWireByName(IdString name) const;
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IdString getWireName(WireId wire) const;
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IdString getWireType(WireId wire) const;
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std::vector<std::pair<IdString, std::string>> getWireAttrs(WireId wire) const;
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uint32_t getWireChecksum(WireId wire) const;
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void bindWire(WireId wire, NetInfo *net, PlaceStrength strength);
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void unbindWire(WireId wire);
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bool checkWireAvail(WireId wire) const;
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NetInfo *getBoundWireNet(WireId wire) const;
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WireId getConflictingWireWire(WireId wire) const;
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NetInfo *getConflictingWireNet(WireId wire) const;
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DelayInfo getWireDelay(WireId wire) const;
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BelPinRange getWireBelPins(WireId wire) const;
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WireRange getWires() const;
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const std::vector<BelPin> &getWireBelPins(WireId wire) const;
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const std::vector<WireId> &getWires() const;
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// -------------------------------------------------
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PipId getPipByName(IdString name) const;
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void bindPip(PipId pip, NetInfo *net, PlaceStrength strength);
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void unbindPip(PipId pip);
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bool checkPipAvail(PipId pip) const;
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NetInfo *getBoundPipNet(PipId pip) const;
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WireId getConflictingPipWire(PipId pip) const;
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NetInfo *getConflictingPipNet(PipId pip) const;
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AllPipRange getPips() const;
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const std::vector<PipId> &getPips() const;
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Loc getPipLocation(PipId pip) const;
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IdString getPipName(PipId pip) const;
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IdString getPipType(PipId pip) const;
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std::vector<std::pair<IdString, std::string>> getPipAttrs(PipId pip) const;
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uint32_t getPipChecksum(PipId pip) const;
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WireId getPipSrcWire(PipId pip) const;
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WireId getPipDstWire(PipId pip) const;
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DelayInfo getPipDelay(PipId pip) const;
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PipRange getPipsDownhill(WireId wire) const;
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PipRange getPipsUphill(WireId wire) const;
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PipRange getWireAliases(WireId wire) const;
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const std::vector<BelPin> &getPipsDownhill(WireId wire) const;
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const std::vector<BelPin> &getPipsUphill(WireId wire) const;
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const std::vector<BelPin> &getWireAliases(WireId wire) const;
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BelId getPackagePinBel(const std::string &pin) const;
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std::string getBelPackagePin(BelId bel) const;
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@ -1,7 +1,7 @@
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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2020 Lofty <dan.ravensloft@gmail.com>
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* Copyright (C) 2021 Lofty <dan.ravensloft@gmail.com
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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@ -21,8 +21,12 @@
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#error Include "archdefs.h" via "nextpnr.h" only.
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#endif
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#include "mistral/lib/cyclonev.h"
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NEXTPNR_NAMESPACE_BEGIN
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using mistral::CycloneV;
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typedef int delay_t;
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struct DelayInfo
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@ -48,11 +52,13 @@ struct DelayInfo
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struct BelId
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{
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int32_t index = -1;
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// pos_t is used for X/Y, nextpnr-cyclonev uses its own Z coordinate system.
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CycloneV::pos_t pos = 0;
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uint16_t z = 0;
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bool operator==(const BelId &other) const { return index == other.index; }
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bool operator!=(const BelId &other) const { return index != other.index; }
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bool operator<(const BelId &other) const { return index < other.index; }
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bool operator==(const BelId &other) const { return pos == other.pos && z == other.z; }
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bool operator!=(const BelId &other) const { return pos != other.pos || z != other.z; }
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bool operator<(const BelId &other) const { return pos < other.pos || (pos == other.pos && z < other.z); }
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};
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struct WireId
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@ -90,10 +96,6 @@ struct DecalId
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enum : int8_t
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{
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TYPE_NONE,
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TYPE_BEL,
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TYPE_WIRE,
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TYPE_PIP,
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TYPE_GROUP
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} type = TYPE_NONE;
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int32_t index = -1;
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bool active = false;
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@ -108,37 +110,8 @@ struct ArchNetInfo
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bool is_reset = false, is_enable = false;
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};
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struct NetInfo;
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struct ArchCellInfo
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{
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union
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{
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struct
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{
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bool dffEnable;
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bool carryEnable;
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bool negClk;
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int inputCount;
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const NetInfo *clk, *cen, *sr;
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} lcInfo;
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struct
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{
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bool lvds;
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bool global;
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bool negtrig;
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int pintype;
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// TODO: clk packing checks...
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} ioInfo;
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struct
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{
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bool forPadIn;
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} gbInfo;
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struct
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{
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bool ledCurConnected;
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} ledInfo;
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};
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};
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NEXTPNR_NAMESPACE_END
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