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Gowin: use global VCC and VSS nets (#956)

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* use global VCC and VSS nets

* derp

* remove init parameter
This commit is contained in:
Pepijn de Vos 2022-03-19 19:44:08 +01:00 committed by GitHub
parent 774d3944b3
commit bb923c7732
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 22 additions and 10 deletions
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11
gowin/arch.cc
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@ -440,7 +440,9 @@ IdString Arch::wireToGlobal(int &row, int &col, const DatabasePOD *db, IdString
{ {
const std::string &wirename = wire.str(this); const std::string &wirename = wire.str(this);
char buf[32]; char buf[32];
if (wirename == "VCC" || wirename == "GND") { if (wirename == "VCC" || wirename == "VSS") {
row = 0;
col = 0;
return wire; return wire;
} }
if (!isdigit(wirename[1]) || !isdigit(wirename[2]) || !isdigit(wirename[3])) { if (!isdigit(wirename[1]) || !isdigit(wirename[2]) || !isdigit(wirename[3])) {
@ -949,6 +951,13 @@ Arch::Arch(ArchArgs args) : args(args)
package_name.c_str(this), speed_id.c_str(this)); package_name.c_str(this), speed_id.c_str(this));
// setup db // setup db
// add global VCC and GND bels
addBel(id_GND, id_GND, Loc(0, 0, 998), true);
addWire(id_VSS, id_VSS, 0, 0);
addBelOutput(id_GND, id_G, id_VSS);
addBel(id_VCC, id_VCC, Loc(0, 0, 999), true);
addWire(id_VCC, id_VCC, 0, 0);
addBelOutput(id_VCC, id_V, id_VCC);
char buf[32]; char buf[32];
// The reverse order of the enumeration simplifies the creation // The reverse order of the enumeration simplifies the creation
// of MUX2_LUT8s: they need the existence of the wire on the right. // of MUX2_LUT8s: they need the existence of the wire on the right.

4
gowin/cells.cc
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@ -65,6 +65,10 @@ std::unique_ptr<CellInfo> create_generic_cell(Context *ctx, IdString type, std::
new_cell->addOutput(id_O); new_cell->addOutput(id_O);
} else if (type == id_GSR) { } else if (type == id_GSR) {
new_cell->addInput(id_GSRI); new_cell->addInput(id_GSRI);
} else if (type == id_GND) {
new_cell->addOutput(id_G);
} else if (type == id_VCC) {
new_cell->addOutput(id_V);
} else { } else {
log_error("unable to create generic cell of type %s\n", type.c_str(ctx)); log_error("unable to create generic cell of type %s\n", type.c_str(ctx));
} }

2
gowin/constids.inc
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@ -787,6 +787,8 @@ X(SUM)
X(CIN) X(CIN)
X(COUT) X(COUT)
X(OF) X(OF)
X(V)
X(G)
// timing // timing
X(X0) X(X0)

15
gowin/pack.cc
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@ -611,20 +611,17 @@ static void pack_constants(Context *ctx)
{ {
log_info("Packing constants..\n"); log_info("Packing constants..\n");
std::unique_ptr<CellInfo> gnd_cell = create_generic_cell(ctx, id_SLICE, "$PACKER_GND"); std::unique_ptr<CellInfo> gnd_cell = create_generic_cell(ctx, id_GND, "$PACKER_GND");
gnd_cell->params[id_INIT] = Property(0, 1 << 4);
auto gnd_net = std::make_unique<NetInfo>(ctx->id("$PACKER_GND_NET")); auto gnd_net = std::make_unique<NetInfo>(ctx->id("$PACKER_GND_NET"));
gnd_net->driver.cell = gnd_cell.get(); gnd_net->driver.cell = gnd_cell.get();
gnd_net->driver.port = id_F; gnd_net->driver.port = id_G;
gnd_cell->ports.at(id_F).net = gnd_net.get(); gnd_cell->ports.at(id_G).net = gnd_net.get();
std::unique_ptr<CellInfo> vcc_cell = create_generic_cell(ctx, id_SLICE, "$PACKER_VCC"); std::unique_ptr<CellInfo> vcc_cell = create_generic_cell(ctx, id_VCC, "$PACKER_VCC");
// Fill with 1s
vcc_cell->params[id_INIT] = Property(Property::S1).extract(0, (1 << 4), Property::S1);
auto vcc_net = std::make_unique<NetInfo>(ctx->id("$PACKER_VCC_NET")); auto vcc_net = std::make_unique<NetInfo>(ctx->id("$PACKER_VCC_NET"));
vcc_net->driver.cell = vcc_cell.get(); vcc_net->driver.cell = vcc_cell.get();
vcc_net->driver.port = id_F; vcc_net->driver.port = id_V;
vcc_cell->ports.at(id_F).net = vcc_net.get(); vcc_cell->ports.at(id_V).net = vcc_net.get();
std::vector<IdString> dead_nets; std::vector<IdString> dead_nets;