Import spine data
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9121880c5f
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@ -626,4 +626,13 @@ std::vector<std::pair<IdString, std::string>> Arch::getWireAttrs(WireId wire) co
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return ret;
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}
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// -----------------------------------------------------------------------
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bool Arch::is_spine_row(int row) const
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{
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for (auto &spine : chip_info->spines) {
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if (row==spine.row) return true;
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}
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return false;
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}
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NEXTPNR_NAMESPACE_END
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@ -133,6 +133,8 @@ NPNR_PACKED_STRUCT(struct VariantInfoPOD {
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RelSlice<SuffixeSupportedPOD> suffixes;
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});
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NPNR_PACKED_STRUCT(struct SpineInfoPOD { int32_t row; });
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NPNR_PACKED_STRUCT(struct ChipInfoPOD {
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RelPtr<char> family;
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RelPtr<char> device_name;
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@ -145,6 +147,7 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD {
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RelSlice<PIOInfoPOD> pio_info;
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RelSlice<TileInfoPOD> tile_info;
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RelSlice<VariantInfoPOD> variants;
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RelSlice<SpineInfoPOD> spines;
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});
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/************************ End of chipdb section. ************************/
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@ -960,6 +963,7 @@ struct Arch : BaseArch<ArchRanges>
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NPNR_ASSERT_FALSE_STR("no tile with type " + type);
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}
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bool is_spine_row(int row) const;
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// Apply LPF constraints to the context
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bool apply_lpf(std::string filename, std::istream &in);
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@ -394,6 +394,11 @@ def write_database(dev_name, chip, rg, endianness):
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bba.r_slice("supported_speed_grades_%s" % name, len(var_data["speeds"]), "supported_speed_grades")
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bba.r_slice("supported_suffixes_%s" % name, len(var_data["suffixes"]), "supported_suffixes")
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bba.l("spine_info", "SpineInfoPOD")
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spines = chip.global_data_machxo2.spines
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for spine in spines:
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bba.u32(spine.row, "row")
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bba.l("chip_info")
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bba.s(chip.info.family, "family")
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bba.s(chip.info.name, "device_name")
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@ -408,6 +413,7 @@ def write_database(dev_name, chip, rg, endianness):
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bba.r_slice("pio_info", len(pindata), "pio_info")
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bba.r_slice("tiles_info", (max_col + 1) * (max_row + 1), "tile_info")
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bba.r_slice("variant_data", len(variants), "variant_info")
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bba.r_slice("spine_info", len(spines), "spine_info")
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bba.pop()
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return bba
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