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generic: Allow bel pins without wires

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Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2022-04-04 19:49:44 +01:00
parent fcf2bf6a95
commit c4e47ba1a8
1 changed files with 6 additions and 3 deletions
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9
generic/arch.cc
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@ -119,7 +119,8 @@ void Arch::addBelInput(BelId bel, IdString name, WireId wire)
pi.wire = wire;
pi.type = PORT_IN;
wire_info(wire).bel_pins.push_back(BelPin{bel, name});
if (wire != WireId())
wire_info(wire).bel_pins.push_back(BelPin{bel, name});
}
void Arch::addBelOutput(BelId bel, IdString name, WireId wire)
@ -131,7 +132,8 @@ void Arch::addBelOutput(BelId bel, IdString name, WireId wire)
pi.wire = wire;
pi.type = PORT_OUT;
wire_info(wire).bel_pins.push_back(BelPin{bel, name});
if (wire != WireId())
wire_info(wire).bel_pins.push_back(BelPin{bel, name});
}
void Arch::addBelInout(BelId bel, IdString name, WireId wire)
@ -143,7 +145,8 @@ void Arch::addBelInout(BelId bel, IdString name, WireId wire)
pi.wire = wire;
pi.type = PORT_INOUT;
wire_info(wire).bel_pins.push_back(BelPin{bel, name});
if (wire != WireId())
wire_info(wire).bel_pins.push_back(BelPin{bel, name});
}
void Arch::addGroupBel(IdStringList group, BelId bel) { groups[group].bels.push_back(bel); }