diff --git a/xc7/arch.cc b/xc7/arch.cc index 042fb689..cc755254 100644 --- a/xc7/arch.cc +++ b/xc7/arch.cc @@ -929,14 +929,19 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, Id return TMG_CLOCK_INPUT; if (port == id_CIN) return TMG_COMB_INPUT; - if (port == id_COUT || port == id_O) + if (port == id_COUT) return TMG_COMB_OUTPUT; + if (port == id_O) { + // LCs with no inputs are constant drivers + if (cell->lcInfo.inputCount == 0) + return TMG_IGNORE; + return TMG_COMB_OUTPUT; + } if (cell->lcInfo.dffEnable) { clockPort = id_CLK; if (port == id_OQ) return TMG_REGISTER_OUTPUT; - else - return TMG_REGISTER_INPUT; + return TMG_REGISTER_INPUT; } else { return TMG_COMB_INPUT; } @@ -996,15 +1001,19 @@ void Arch::assignCellInfo(CellInfo *cell) cell->lcInfo.clk = get_net_or_empty(cell, id_CLK); cell->lcInfo.cen = get_net_or_empty(cell, id_CEN); cell->lcInfo.sr = get_net_or_empty(cell, id_SR); -// cell->lcInfo.inputCount = 0; -// if (get_net_or_empty(cell, id_I0)) -// cell->lcInfo.inputCount++; -// if (get_net_or_empty(cell, id_I1)) -// cell->lcInfo.inputCount++; -// if (get_net_or_empty(cell, id_I2)) -// cell->lcInfo.inputCount++; -// if (get_net_or_empty(cell, id_I3)) -// cell->lcInfo.inputCount++; + cell->lcInfo.inputCount = 0; + if (get_net_or_empty(cell, id_I1)) + cell->lcInfo.inputCount++; + if (get_net_or_empty(cell, id_I2)) + cell->lcInfo.inputCount++; + if (get_net_or_empty(cell, id_I3)) + cell->lcInfo.inputCount++; + if (get_net_or_empty(cell, id_I4)) + cell->lcInfo.inputCount++; + if (get_net_or_empty(cell, id_I5)) + cell->lcInfo.inputCount++; + if (get_net_or_empty(cell, id_I6)) + cell->lcInfo.inputCount++; } }