From c90d872e3586d8129b46638d96325990d5588c20 Mon Sep 17 00:00:00 2001 From: gatecat Date: Thu, 26 Sep 2024 15:56:20 +0200 Subject: [PATCH] xilinx: Filter out another missing pip type Signed-off-by: gatecat --- himbaechel/uarch/xilinx/gen/filters.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/himbaechel/uarch/xilinx/gen/filters.py b/himbaechel/uarch/xilinx/gen/filters.py index ba74546d..20b48ab7 100644 --- a/himbaechel/uarch/xilinx/gen/filters.py +++ b/himbaechel/uarch/xilinx/gen/filters.py @@ -91,6 +91,8 @@ def include_pip(tile_type, p): if tile_type.startswith("HCLK_IOI"): if "RCLK_BEFORE_DIV" in p.dst_wire().name() and "IMUX" in p.src_wire().name(): return False + if p.dst_wire().name().endswith("_DMUX") and "I2IOCLK_TOP" in p.src_wire().name(): + return False if "IOI" in tile_type: if "CLKB" in p.dst_wire().name() and "IMUX22" in p.src_wire().name(): return False