Wires now encapsulate segments
This commit is contained in:
parent
df2f295545
commit
ca7eef26ac
42
xc7/arch.cc
42
xc7/arch.cc
@ -35,7 +35,7 @@ NEXTPNR_NAMESPACE_BEGIN
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std::unique_ptr<const TorcInfo> torc_info;
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std::unique_ptr<const TorcInfo> torc_info;
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TorcInfo::TorcInfo(Arch *ctx, const std::string &inDeviceName, const std::string &inPackageName)
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TorcInfo::TorcInfo(Arch *ctx, const std::string &inDeviceName, const std::string &inPackageName)
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: ddb(new DDB(inDeviceName, inPackageName)), sites(ddb->getSites()), tiles(ddb->getTiles()), bel_to_site_index(construct_bel_to_site_index(ctx, sites)), num_bels(bel_to_site_index.size()), site_index_to_type(construct_site_index_to_type(ctx, sites)), bel_to_z(construct_bel_to_z(sites, num_bels, site_index_to_type))
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: ddb(new DDB(inDeviceName, inPackageName)), sites(ddb->getSites()), tiles(ddb->getTiles()), segments(ddb->getSegments()), bel_to_site_index(construct_bel_to_site_index(ctx, sites)), num_bels(bel_to_site_index.size()), site_index_to_type(construct_site_index_to_type(ctx, sites)), bel_to_z(construct_bel_to_z(sites, num_bels, site_index_to_type)), wire_to_tilewire(construct_wire_to_tilewire(segments, tiles)), num_wires(wire_to_tilewire.size())
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{
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{
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}
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}
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std::vector<SiteIndex> TorcInfo::construct_bel_to_site_index(Arch* ctx, const Sites &sites)
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std::vector<SiteIndex> TorcInfo::construct_bel_to_site_index(Arch* ctx, const Sites &sites)
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@ -102,6 +102,29 @@ std::vector<int8_t> TorcInfo::construct_bel_to_z(const Sites &sites, const int n
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}
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}
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return bel_to_z;
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return bel_to_z;
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}
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}
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std::vector<Tilewire> TorcInfo::construct_wire_to_tilewire(const Segments& segments, const Tiles& tiles)
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{
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std::vector<Tilewire> wire_to_tilewire(segments.getCompactSegmentCount());
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Tilewire currentTilewire;
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for(TileIndex tileIndex(0); tileIndex < tiles.getTileCount(); tileIndex++) {
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// iterate over every wire in the tile
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const auto& tileInfo = tiles.getTileInfo(tileIndex);
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auto tileTypeIndex = tileInfo.getTypeIndex();
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auto wireCount = tiles.getWireCount(tileTypeIndex);
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currentTilewire.setTileIndex(tileIndex);
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for(WireIndex wireIndex(0); wireIndex < wireCount; wireIndex++) {
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currentTilewire.setWireIndex(wireIndex);
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const auto& currentSegment = segments.getTilewireSegment(currentTilewire);
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if (currentSegment.getAnchorTileIndex() != tileIndex) continue;
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wire_to_tilewire[currentSegment.getCompactSegmentIndex()] = currentTilewire;
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}
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}
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return wire_to_tilewire;
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}
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// -----------------------------------------------------------------------
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// -----------------------------------------------------------------------
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@ -134,7 +157,11 @@ Arch::Arch(ArchArgs args) : args(args)
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// if (package_info == nullptr)
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// if (package_info == nullptr)
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// log_error("Unsupported package '%s'.\n", args.package.c_str());
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// log_error("Unsupported package '%s'.\n", args.package.c_str());
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//bel_carry.resize(chip_info->num_bels);
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bel_to_cell.resize(torc_info->num_bels);
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bel_to_cell.resize(torc_info->num_bels);
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wire_to_net.resize(torc_info->num_wires);
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//pip_to_net.resize(chip_info->num_pips);
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//switches_locked.resize(chip_info->num_switches);
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}
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}
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// -----------------------------------------------------------------------
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// -----------------------------------------------------------------------
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@ -251,12 +278,13 @@ WireId Arch::getBelPinWire(BelId bel, IdString pin) const
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}
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}
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}
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}
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auto site_index = torc_info->bel_to_site_index[bel.index];
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auto site_index = torc_info->bel_to_site_index[bel.index];
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auto &site = torc_info->sites.getSite(site_index);
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const auto &site = torc_info->sites.getSite(site_index);
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ret.index = site.getPinTilewire(pin_name);
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auto &tw = site.getPinTilewire(pin_name);
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if (ret.index.isUndefined())
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if (tw.isUndefined())
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log_error("no wire found for site '%s' pin '%s' \n", torc_info->bel_to_name(bel.index).c_str(), pin_name.c_str());
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log_error("no wire found for site '%s' pin '%s' \n", torc_info->bel_to_name(bel.index).c_str(), pin_name.c_str());
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ret.index = torc_info->tilewire_to_wire(tw);
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// NPNR_ASSERT(bel != BelId());
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// NPNR_ASSERT(bel != BelId());
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//
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//
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@ -592,8 +620,8 @@ DecalXY Arch::getWireDecal(WireId wire) const
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{
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{
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DecalXY decalxy;
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DecalXY decalxy;
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decalxy.decal.type = DecalId::TYPE_WIRE;
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decalxy.decal.type = DecalId::TYPE_WIRE;
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//decalxy.decal.index = wire.index;
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decalxy.decal.index = wire.index;
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//decalxy.decal.active = wire_to_net.at(wire.index) != nullptr;
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decalxy.decal.active = wire_to_net.at(wire.index) != nullptr;
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return decalxy;
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return decalxy;
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}
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}
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69
xc7/arch.h
69
xc7/arch.h
@ -239,6 +239,7 @@ struct TorcInfo {
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std::unique_ptr<const DDB> ddb;
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std::unique_ptr<const DDB> ddb;
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const Sites &sites;
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const Sites &sites;
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const Tiles &tiles;
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const Tiles &tiles;
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const Segments &segments;
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const TileInfo& bel_to_tile_info(int32_t index) const {
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const TileInfo& bel_to_tile_info(int32_t index) const {
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auto si = bel_to_site_index[index];
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auto si = bel_to_site_index[index];
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@ -249,16 +250,32 @@ struct TorcInfo {
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auto si = bel_to_site_index[index];
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auto si = bel_to_site_index[index];
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return sites.getSite(si).getName();
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return sites.getSite(si).getName();
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}
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}
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std::string wire_to_name(int32_t index) const
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{
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const auto tw = wire_to_tilewire[index];
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ExtendedWireInfo ewi(*ddb, tw);
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std::stringstream ss;
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ss << ewi.mTileName << "/" << ewi.mWireName;
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return ss.str();
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}
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int32_t tilewire_to_wire(const Tilewire &tw) const
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{
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const auto& segment = segments.getTilewireSegment(tw);
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return segment.getCompactSegmentIndex();
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}
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const std::vector<SiteIndex> bel_to_site_index;
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const std::vector<SiteIndex> bel_to_site_index;
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const int num_bels;
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const int num_bels;
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const std::vector<IdString> site_index_to_type;
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const std::vector<IdString> site_index_to_type;
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const std::vector<int8_t> bel_to_z;
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const std::vector<int8_t> bel_to_z;
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const std::vector<Tilewire> wire_to_tilewire;
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const int num_wires;
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private:
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private:
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static std::vector<SiteIndex> construct_bel_to_site_index(Arch *ctx, const Sites &sites);
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static std::vector<SiteIndex> construct_bel_to_site_index(Arch *ctx, const Sites &sites);
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static std::vector<IdString> construct_site_index_to_type(Arch *ctx, const Sites &sites);
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static std::vector<IdString> construct_site_index_to_type(Arch *ctx, const Sites &sites);
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static std::vector<int8_t> construct_bel_to_z(const Sites &sites, const int num_bels, const std::vector<IdString> &site_index_to_type);
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static std::vector<int8_t> construct_bel_to_z(const Sites &sites, const int num_bels, const std::vector<IdString> &site_index_to_type);
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static std::vector<Tilewire> construct_wire_to_tilewire(const Segments &segments, const Tiles &tiles);
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};
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};
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extern std::unique_ptr<const TorcInfo> torc_info;
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extern std::unique_ptr<const TorcInfo> torc_info;
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@ -330,11 +347,10 @@ struct BelPinRange
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struct WireIterator
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struct WireIterator
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{
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{
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Tilewire cursor;
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int cursor = -1;
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// TODO
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void operator++() { cursor++; }
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void operator++() { /*cursor++;*/ }
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bool operator!=(const WireIterator &other) const { return cursor != other.cursor; }
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bool operator!=(const WireIterator &other) const { return !(cursor == other.cursor); }
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WireId operator*() const
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WireId operator*() const
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{
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{
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@ -549,19 +565,18 @@ struct Arch : BaseCtx
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IdString getWireName(WireId wire) const
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IdString getWireName(WireId wire) const
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{
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{
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NPNR_ASSERT(wire != WireId());
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NPNR_ASSERT(wire != WireId());
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//return id(chip_info->wire_data[wire.index].name.get());
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return id(torc_info->wire_to_name(wire.index));
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return IdString();
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}
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}
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IdString getWireType(WireId wire) const;
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IdString getWireType(WireId wire) const;
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uint32_t getWireChecksum(WireId wire) const { return hash_value(wire.index); }
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uint32_t getWireChecksum(WireId wire) const { return wire.index; }
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void bindWire(WireId wire, NetInfo *net, PlaceStrength strength)
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void bindWire(WireId wire, NetInfo *net, PlaceStrength strength)
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{
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{
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NPNR_ASSERT(wire != WireId());
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NPNR_ASSERT(wire != WireId());
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//NPNR_ASSERT(wire_to_net[wire.index] == nullptr);
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NPNR_ASSERT(wire_to_net[wire.index] == nullptr);
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//wire_to_net[wire.index] = net;
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wire_to_net[wire.index] = net;
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net->wires[wire].pip = PipId();
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net->wires[wire].pip = PipId();
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net->wires[wire].strength = strength;
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net->wires[wire].strength = strength;
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refreshUiWire(wire);
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refreshUiWire(wire);
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@ -570,11 +585,11 @@ struct Arch : BaseCtx
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void unbindWire(WireId wire)
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void unbindWire(WireId wire)
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{
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{
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NPNR_ASSERT(wire != WireId());
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NPNR_ASSERT(wire != WireId());
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//NPNR_ASSERT(wire_to_net[wire.index] != nullptr);
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NPNR_ASSERT(wire_to_net[wire.index] != nullptr);
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//auto &net_wires = wire_to_net[wire.index]->wires;
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auto &net_wires = wire_to_net[wire.index]->wires;
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//auto it = net_wires.find(wire);
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auto it = net_wires.find(wire);
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//NPNR_ASSERT(it != net_wires.end());
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NPNR_ASSERT(it != net_wires.end());
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//auto pip = it->second.pip;
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//auto pip = it->second.pip;
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//if (pip != PipId()) {
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//if (pip != PipId()) {
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@ -582,29 +597,29 @@ struct Arch : BaseCtx
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// switches_locked[chip_info->pip_data[pip.index].switch_index] = nullptr;
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// switches_locked[chip_info->pip_data[pip.index].switch_index] = nullptr;
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//}
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//}
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//net_wires.erase(it);
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net_wires.erase(it);
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//wire_to_net[wire.index] = nullptr;
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wire_to_net[wire.index] = nullptr;
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refreshUiWire(wire);
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refreshUiWire(wire);
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}
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}
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bool checkWireAvail(WireId wire) const
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bool checkWireAvail(WireId wire) const
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{
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{
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//NPNR_ASSERT(wire != WireId());
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NPNR_ASSERT(wire != WireId());
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//return wire_to_net[wire.index] == nullptr;
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return wire_to_net[wire.index] == nullptr;
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return true;
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return true;
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}
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}
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NetInfo *getBoundWireNet(WireId wire) const
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NetInfo *getBoundWireNet(WireId wire) const
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{
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{
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//NPNR_ASSERT(wire != WireId());
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NPNR_ASSERT(wire != WireId());
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//return wire_to_net[wire.index];
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return wire_to_net[wire.index];
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return nullptr;
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return nullptr;
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}
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}
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NetInfo *getConflictingWireNet(WireId wire) const
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NetInfo *getConflictingWireNet(WireId wire) const
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{
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{
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//NPNR_ASSERT(wire != WireId());
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NPNR_ASSERT(wire != WireId());
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//return wire_to_net[wire.index];
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return wire_to_net[wire.index];
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return nullptr;
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return nullptr;
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}
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}
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@ -631,8 +646,8 @@ struct Arch : BaseCtx
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WireRange getWires() const
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WireRange getWires() const
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{
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{
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WireRange range;
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WireRange range;
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//range.b.cursor = 0;
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range.b.cursor = 0;
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//range.e.cursor = chip_info->num_wires;
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range.e.cursor = torc_info->num_wires;
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return range;
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return range;
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}
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}
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@ -651,8 +666,8 @@ struct Arch : BaseCtx
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WireId dst;
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WireId dst;
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//dst.index = chip_info->pip_data[pip.index].dst;
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//dst.index = chip_info->pip_data[pip.index].dst;
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//NPNR_ASSERT(wire_to_net[dst.index] == nullptr);
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NPNR_ASSERT(wire_to_net[dst.index] == nullptr);
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//wire_to_net[dst.index] = net;
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wire_to_net[dst.index] = net;
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//net->wires[dst].pip = pip;
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//net->wires[dst].pip = pip;
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//net->wires[dst].strength = strength;
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//net->wires[dst].strength = strength;
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refreshUiPip(pip);
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refreshUiPip(pip);
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@ -667,8 +682,8 @@ struct Arch : BaseCtx
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WireId dst;
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WireId dst;
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//dst.index = chip_info->pip_data[pip.index].dst;
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//dst.index = chip_info->pip_data[pip.index].dst;
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//NPNR_ASSERT(wire_to_net[dst.index] != nullptr);
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NPNR_ASSERT(wire_to_net[dst.index] != nullptr);
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//wire_to_net[dst.index] = nullptr;
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wire_to_net[dst.index] = nullptr;
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pip_to_net[pip.index]->wires.erase(dst);
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pip_to_net[pip.index]->wires.erase(dst);
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pip_to_net[pip.index] = nullptr;
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pip_to_net[pip.index] = nullptr;
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@ -74,10 +74,10 @@ struct BelId
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struct WireId
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struct WireId
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{
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{
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Tilewire index;
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int32_t index = -1;
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bool operator==(const WireId &other) const { return index == other.index; }
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bool operator==(const WireId &other) const { return index == other.index; }
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bool operator!=(const WireId &other) const { return !(index == other.index); }
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bool operator!=(const WireId &other) const { return index != other.index; }
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};
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};
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struct PipId
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struct PipId
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@ -164,7 +164,7 @@ template <> struct hash<NEXTPNR_NAMESPACE_PREFIX WireId>
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{
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{
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std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX WireId &wire) const noexcept
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std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX WireId &wire) const noexcept
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{
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{
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return hash_value(wire.index);
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return hash<int>()(wire.index);
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}
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}
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};
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};
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