Missing files
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550271b338
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cadafffbec
46
xc7/cells.cc
46
xc7/cells.cc
@ -285,48 +285,48 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l
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lc->params[ctx->id("DFF_ENABLE")] = "1";
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std::string config = dff->type.str(ctx).substr(2);
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auto citer = config.begin();
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replace_port(dff, ctx->id("C"), lc, ctx->id("CLK"));
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replace_port(dff, id_C, lc, id_CLK);
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if (citer != config.end()) {
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auto gnd_net = ctx->nets.at(ctx->id("$PACKER_GND_NET")).get();
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if (*citer == 'S') {
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citer++;
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if (get_net_or_empty(dff, ctx->id("S")) != gnd_net) {
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lc->params[ctx->id("SR")] = "SRHIGH";
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if (get_net_or_empty(dff, id_S) != gnd_net) {
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lc->params[id_SR] = "SRHIGH";
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lc->params[ctx->id("SYNC_ATTR")] = "SYNC";
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replace_port(dff, ctx->id("S"), lc, ctx->id("SR"));
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replace_port(dff, id_S, lc, id_SR);
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}
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else
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disconnect_port(ctx, dff, ctx->id("S"));
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disconnect_port(ctx, dff, id_S);
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} else if (*citer == 'R') {
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citer++;
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if (get_net_or_empty(dff, ctx->id("R")) != gnd_net) {
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lc->params[ctx->id("SR")] = "SRLOW";
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if (get_net_or_empty(dff, id_R) != gnd_net) {
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lc->params[id_SR] = "SRLOW";
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lc->params[ctx->id("SYNC_ATTR")] = "SYNC";
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replace_port(dff, ctx->id("R"), lc, ctx->id("SR"));
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replace_port(dff, id_R, lc, id_SR);
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}
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else
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disconnect_port(ctx, dff, ctx->id("R"));
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disconnect_port(ctx, dff, id_R);
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} else if (*citer == 'C') {
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citer++;
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if (get_net_or_empty(dff, ctx->id("CLR")) != gnd_net) {
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lc->params[ctx->id("SR")] = "SRLOW";
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if (get_net_or_empty(dff, id_CLR) != gnd_net) {
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lc->params[id_SR] = "SRLOW";
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lc->params[ctx->id("SYNC_ATTR")] = "ASYNC";
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replace_port(dff, ctx->id("CLR"), lc, ctx->id("SR"));
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replace_port(dff, id_CLR, lc, id_SR);
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}
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else
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disconnect_port(ctx, dff, ctx->id("CLR"));
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disconnect_port(ctx, dff, id_CLR);
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} else {
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NPNR_ASSERT(*citer == 'P');
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citer++;
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if (get_net_or_empty(dff, ctx->id("PRE")) != gnd_net) {
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lc->params[ctx->id("SR")] = "SRHIGH";
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if (get_net_or_empty(dff, id_PRE) != gnd_net) {
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lc->params[id_SR] = "SRHIGH";
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lc->params[ctx->id("SYNC_ATTR")] = "ASYNC";
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replace_port(dff, ctx->id("PRE"), lc, ctx->id("SR"));
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replace_port(dff, id_PRE, lc, id_SR);
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}
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else
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disconnect_port(ctx, dff, ctx->id("PRE"));
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disconnect_port(ctx, dff, id_PRE);
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}
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}
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@ -410,14 +410,14 @@ bool is_clock_port(const BaseCtx *ctx, const PortRef &port)
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if (port.cell == nullptr)
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return false;
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if (is_ff(ctx, port.cell))
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return port.port == ctx->id("C");
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return port.port == id_C;
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if (port.cell->type == ctx->id("ICESTORM_LC"))
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return port.port == ctx->id("CLK");
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return port.port == id_CLK;
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if (is_ram(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_RAM"))
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return port.port == ctx->id("RCLK") || port.port == ctx->id("WCLK") || port.port == ctx->id("RCLKN") ||
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port.port == ctx->id("WCLKN");
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if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP"))
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return port.port == ctx->id("CLK");
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return port.port == id_CLK;
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return false;
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}
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@ -426,9 +426,9 @@ bool is_reset_port(const BaseCtx *ctx, const PortRef &port)
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if (port.cell == nullptr)
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return false;
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if (is_ff(ctx, port.cell))
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return port.port == ctx->id("R") || port.port == ctx->id("S");
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return port.port == id_R || port.port == id_S;
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if (port.cell->type == ctx->id("ICESTORM_LC"))
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return port.port == ctx->id("SR");
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return port.port == id_SR;
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if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP"))
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return port.port == ctx->id("IRSTTOP") || port.port == ctx->id("IRSTBOT") || port.port == ctx->id("ORSTTOP") ||
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port.port == ctx->id("ORSTBOT");
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@ -442,7 +442,7 @@ bool is_enable_port(const BaseCtx *ctx, const PortRef &port)
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if (is_ff(ctx, port.cell))
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return port.port == ctx->id("E");
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if (port.cell->type == ctx->id("ICESTORM_LC"))
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return port.port == ctx->id("CEN");
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return port.port == id_CEN;
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// FIXME
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// if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP"))
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// return port.port == ctx->id("CE");
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@ -14,6 +14,10 @@ X(COUT)
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X(CEN)
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X(CLK)
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X(SR)
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X(S)
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X(R)
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X(PRE)
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X(CLR)
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X(MASK_0)
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X(MASK_1)
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@ -309,7 +309,7 @@ static void set_net_constant(const Context *ctx, NetInfo *orig, NetInfo *constne
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!constval) {
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uc->ports[user.port].net = nullptr;
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} else if ((is_sb_mac16(ctx, uc) || uc->type == ctx->id("ICESTORM_DSP")) &&
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(user.port != ctx->id("CLK") &&
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(user.port != id_CLK &&
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((constval && user.port == ctx->id("CE")) || (!constval && user.port != ctx->id("CE"))))) {
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uc->ports[user.port].net = nullptr;
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} else if (is_ram(ctx, uc) && !constval && user.port != ctx->id("RCLK") && user.port != ctx->id("RCLKN") &&
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@ -178,8 +178,8 @@ DesignSharedPtr create_torc_design(const Context *ctx)
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if (cell.second->lcInfo.negClk)
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instPtr->setConfig("CLKINV", "", "CLK_B");
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if (get_net_or_empty(cell.second.get(), ctx->id("SR"))) {
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instPtr->setConfig(setting + "SR", "", cell.second->params.at(ctx->id("SR")));
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if (get_net_or_empty(cell.second.get(), id_SR)) {
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instPtr->setConfig(setting + "SR", "", cell.second->params.at(id_SR));
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instPtr->setConfig("SYNC_ATTR", "", cell.second->params.at(ctx->id("SYNC_ATTR")));
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instPtr->setConfig("SRUSEDMUX", "", "IN");
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}
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