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Missing files

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This commit is contained in:
Eddie Hung 2018-12-07 22:23:15 +00:00
parent 550271b338
commit cadafffbec
4 changed files with 30 additions and 26 deletions
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46
xc7/cells.cc
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@ -285,48 +285,48 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l
lc->params[ctx->id("DFF_ENABLE")] = "1"; lc->params[ctx->id("DFF_ENABLE")] = "1";
std::string config = dff->type.str(ctx).substr(2); std::string config = dff->type.str(ctx).substr(2);
auto citer = config.begin(); auto citer = config.begin();
replace_port(dff, ctx->id("C"), lc, ctx->id("CLK")); replace_port(dff, id_C, lc, id_CLK);
if (citer != config.end()) { if (citer != config.end()) {
auto gnd_net = ctx->nets.at(ctx->id("$PACKER_GND_NET")).get(); auto gnd_net = ctx->nets.at(ctx->id("$PACKER_GND_NET")).get();
if (*citer == 'S') { if (*citer == 'S') {
citer++; citer++;
if (get_net_or_empty(dff, ctx->id("S")) != gnd_net) { if (get_net_or_empty(dff, id_S) != gnd_net) {
lc->params[ctx->id("SR")] = "SRHIGH"; lc->params[id_SR] = "SRHIGH";
lc->params[ctx->id("SYNC_ATTR")] = "SYNC"; lc->params[ctx->id("SYNC_ATTR")] = "SYNC";
replace_port(dff, ctx->id("S"), lc, ctx->id("SR")); replace_port(dff, id_S, lc, id_SR);
} }
else else
disconnect_port(ctx, dff, ctx->id("S")); disconnect_port(ctx, dff, id_S);
} else if (*citer == 'R') { } else if (*citer == 'R') {
citer++; citer++;
if (get_net_or_empty(dff, ctx->id("R")) != gnd_net) { if (get_net_or_empty(dff, id_R) != gnd_net) {
lc->params[ctx->id("SR")] = "SRLOW"; lc->params[id_SR] = "SRLOW";
lc->params[ctx->id("SYNC_ATTR")] = "SYNC"; lc->params[ctx->id("SYNC_ATTR")] = "SYNC";
replace_port(dff, ctx->id("R"), lc, ctx->id("SR")); replace_port(dff, id_R, lc, id_SR);
} }
else else
disconnect_port(ctx, dff, ctx->id("R")); disconnect_port(ctx, dff, id_R);
} else if (*citer == 'C') { } else if (*citer == 'C') {
citer++; citer++;
if (get_net_or_empty(dff, ctx->id("CLR")) != gnd_net) { if (get_net_or_empty(dff, id_CLR) != gnd_net) {
lc->params[ctx->id("SR")] = "SRLOW"; lc->params[id_SR] = "SRLOW";
lc->params[ctx->id("SYNC_ATTR")] = "ASYNC"; lc->params[ctx->id("SYNC_ATTR")] = "ASYNC";
replace_port(dff, ctx->id("CLR"), lc, ctx->id("SR")); replace_port(dff, id_CLR, lc, id_SR);
} }
else else
disconnect_port(ctx, dff, ctx->id("CLR")); disconnect_port(ctx, dff, id_CLR);
} else { } else {
NPNR_ASSERT(*citer == 'P'); NPNR_ASSERT(*citer == 'P');
citer++; citer++;
if (get_net_or_empty(dff, ctx->id("PRE")) != gnd_net) { if (get_net_or_empty(dff, id_PRE) != gnd_net) {
lc->params[ctx->id("SR")] = "SRHIGH"; lc->params[id_SR] = "SRHIGH";
lc->params[ctx->id("SYNC_ATTR")] = "ASYNC"; lc->params[ctx->id("SYNC_ATTR")] = "ASYNC";
replace_port(dff, ctx->id("PRE"), lc, ctx->id("SR")); replace_port(dff, id_PRE, lc, id_SR);
} }
else else
disconnect_port(ctx, dff, ctx->id("PRE")); disconnect_port(ctx, dff, id_PRE);
} }
} }
@ -410,14 +410,14 @@ bool is_clock_port(const BaseCtx *ctx, const PortRef &port)
if (port.cell == nullptr) if (port.cell == nullptr)
return false; return false;
if (is_ff(ctx, port.cell)) if (is_ff(ctx, port.cell))
return port.port == ctx->id("C"); return port.port == id_C;
if (port.cell->type == ctx->id("ICESTORM_LC")) if (port.cell->type == ctx->id("ICESTORM_LC"))
return port.port == ctx->id("CLK"); return port.port == id_CLK;
if (is_ram(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_RAM")) if (is_ram(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_RAM"))
return port.port == ctx->id("RCLK") || port.port == ctx->id("WCLK") || port.port == ctx->id("RCLKN") || return port.port == ctx->id("RCLK") || port.port == ctx->id("WCLK") || port.port == ctx->id("RCLKN") ||
port.port == ctx->id("WCLKN"); port.port == ctx->id("WCLKN");
if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP")) if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP"))
return port.port == ctx->id("CLK"); return port.port == id_CLK;
return false; return false;
} }
@ -426,9 +426,9 @@ bool is_reset_port(const BaseCtx *ctx, const PortRef &port)
if (port.cell == nullptr) if (port.cell == nullptr)
return false; return false;
if (is_ff(ctx, port.cell)) if (is_ff(ctx, port.cell))
return port.port == ctx->id("R") || port.port == ctx->id("S"); return port.port == id_R || port.port == id_S;
if (port.cell->type == ctx->id("ICESTORM_LC")) if (port.cell->type == ctx->id("ICESTORM_LC"))
return port.port == ctx->id("SR"); return port.port == id_SR;
if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP")) if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP"))
return port.port == ctx->id("IRSTTOP") || port.port == ctx->id("IRSTBOT") || port.port == ctx->id("ORSTTOP") || return port.port == ctx->id("IRSTTOP") || port.port == ctx->id("IRSTBOT") || port.port == ctx->id("ORSTTOP") ||
port.port == ctx->id("ORSTBOT"); port.port == ctx->id("ORSTBOT");
@ -442,7 +442,7 @@ bool is_enable_port(const BaseCtx *ctx, const PortRef &port)
if (is_ff(ctx, port.cell)) if (is_ff(ctx, port.cell))
return port.port == ctx->id("E"); return port.port == ctx->id("E");
if (port.cell->type == ctx->id("ICESTORM_LC")) if (port.cell->type == ctx->id("ICESTORM_LC"))
return port.port == ctx->id("CEN"); return port.port == id_CEN;
// FIXME // FIXME
// if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP")) // if (is_sb_mac16(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_DSP"))
// return port.port == ctx->id("CE"); // return port.port == ctx->id("CE");

4
xc7/constids.inc
View File

@ -14,6 +14,10 @@ X(COUT)
X(CEN) X(CEN)
X(CLK) X(CLK)
X(SR) X(SR)
X(S)
X(R)
X(PRE)
X(CLR)
X(MASK_0) X(MASK_0)
X(MASK_1) X(MASK_1)

2
xc7/pack.cc
View File

@ -309,7 +309,7 @@ static void set_net_constant(const Context *ctx, NetInfo *orig, NetInfo *constne
!constval) { !constval) {
uc->ports[user.port].net = nullptr; uc->ports[user.port].net = nullptr;
} else if ((is_sb_mac16(ctx, uc) || uc->type == ctx->id("ICESTORM_DSP")) && } else if ((is_sb_mac16(ctx, uc) || uc->type == ctx->id("ICESTORM_DSP")) &&
(user.port != ctx->id("CLK") && (user.port != id_CLK &&
((constval && user.port == ctx->id("CE")) || (!constval && user.port != ctx->id("CE"))))) { ((constval && user.port == ctx->id("CE")) || (!constval && user.port != ctx->id("CE"))))) {
uc->ports[user.port].net = nullptr; uc->ports[user.port].net = nullptr;
} else if (is_ram(ctx, uc) && !constval && user.port != ctx->id("RCLK") && user.port != ctx->id("RCLKN") && } else if (is_ram(ctx, uc) && !constval && user.port != ctx->id("RCLK") && user.port != ctx->id("RCLKN") &&

4
xc7/xdl.cc
View File

@ -178,8 +178,8 @@ DesignSharedPtr create_torc_design(const Context *ctx)
if (cell.second->lcInfo.negClk) if (cell.second->lcInfo.negClk)
instPtr->setConfig("CLKINV", "", "CLK_B"); instPtr->setConfig("CLKINV", "", "CLK_B");
if (get_net_or_empty(cell.second.get(), ctx->id("SR"))) { if (get_net_or_empty(cell.second.get(), id_SR)) {
instPtr->setConfig(setting + "SR", "", cell.second->params.at(ctx->id("SR"))); instPtr->setConfig(setting + "SR", "", cell.second->params.at(id_SR));
instPtr->setConfig("SYNC_ATTR", "", cell.second->params.at(ctx->id("SYNC_ATTR"))); instPtr->setConfig("SYNC_ATTR", "", cell.second->params.at(ctx->id("SYNC_ATTR")));
instPtr->setConfig("SRUSEDMUX", "", "IN"); instPtr->setConfig("SRUSEDMUX", "", "IN");
} }