Merge pull request #332 from YosysHQ/dave/python-refactor
Improving Python API and adding docs for it
This commit is contained in:
David Shah
GitHub
commit
cb71b488ec
114
common/arch_pybindings_shared.h
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114
common/arch_pybindings_shared.h
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@ -0,0 +1,114 @@
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// Common Python bindings #included by all arches
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readonly_wrapper<Context, decltype(&Context::cells), &Context::cells, wrap_context<CellMap &>>::def_wrap(ctx_cls,
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"cells");
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readonly_wrapper<Context, decltype(&Context::nets), &Context::nets, wrap_context<NetMap &>>::def_wrap(ctx_cls,
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"nets");
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readonly_wrapper<Context, decltype(&Context::net_aliases), &Context::net_aliases,
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wrap_context<AliasMap &>>::def_wrap(ctx_cls, "net_aliases");
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fn_wrapper_1a<Context, decltype(&Context::getNetByAlias), &Context::getNetByAlias, deref_and_wrap<NetInfo>,
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conv_from_str<IdString>>::def_wrap(ctx_cls, "getNetByAlias");
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fn_wrapper_2a_v<Context, decltype(&Context::addClock), &Context::addClock, conv_from_str<IdString>,
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pass_through<float>>::def_wrap(ctx_cls, "addClock");
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fn_wrapper_5a_v<Context, decltype(&Context::createRectangularRegion), &Context::createRectangularRegion,
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conv_from_str<IdString>, pass_through<int>, pass_through<int>, pass_through<int>,
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pass_through<int>>::def_wrap(ctx_cls, "createRectangularRegion");
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fn_wrapper_2a_v<Context, decltype(&Context::addBelToRegion), &Context::addBelToRegion, conv_from_str<IdString>,
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conv_from_str<BelId>>::def_wrap(ctx_cls, "addBelToRegion");
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fn_wrapper_2a_v<Context, decltype(&Context::constrainCellToRegion), &Context::constrainCellToRegion,
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conv_from_str<IdString>, conv_from_str<IdString>>::def_wrap(ctx_cls, "constrainCellToRegion");
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fn_wrapper_1a<Context, decltype(&Context::createNet), &Context::createNet, deref_and_wrap<NetInfo>,
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conv_from_str<IdString>>::def_wrap(ctx_cls, "createNet");
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fn_wrapper_3a_v<Context, decltype(&Context::connectPort), &Context::connectPort, conv_from_str<IdString>, conv_from_str<IdString>,
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conv_from_str<IdString>>::def_wrap(ctx_cls, "connectPort");
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fn_wrapper_2a_v<Context, decltype(&Context::disconnectPort), &Context::disconnectPort, conv_from_str<IdString>,
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conv_from_str<IdString>>::def_wrap(ctx_cls, "disconnectPort");
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fn_wrapper_1a_v<Context, decltype(&Context::ripupNet), &Context::ripupNet, conv_from_str<IdString>>::def_wrap(
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ctx_cls, "ripupNet");
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fn_wrapper_1a_v<Context, decltype(&Context::lockNetRouting), &Context::lockNetRouting, conv_from_str<IdString>>::def_wrap(
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ctx_cls, "lockNetRouting");
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fn_wrapper_2a<Context, decltype(&Context::createCell), &Context::createCell, deref_and_wrap<CellInfo>,
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conv_from_str<IdString>, conv_from_str<IdString>>::def_wrap(ctx_cls, "createCell");
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fn_wrapper_2a_v<Context, decltype(&Context::copyBelPorts), &Context::copyBelPorts,
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conv_from_str<IdString>, conv_from_str<BelId>>::def_wrap(ctx_cls, "copyBelPorts");
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fn_wrapper_1a<Context, decltype(&Context::getBelType), &Context::getBelType, conv_to_str<IdString>,
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conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelType");
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fn_wrapper_1a<Context, decltype(&Context::checkBelAvail), &Context::checkBelAvail, pass_through<bool>,
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conv_from_str<BelId>>::def_wrap(ctx_cls, "checkBelAvail");
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fn_wrapper_1a<Context, decltype(&Context::getBelChecksum), &Context::getBelChecksum, pass_through<uint32_t>,
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conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelChecksum");
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fn_wrapper_3a_v<Context, decltype(&Context::bindBel), &Context::bindBel, conv_from_str<BelId>,
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addr_and_unwrap<CellInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindBel");
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fn_wrapper_1a_v<Context, decltype(&Context::unbindBel), &Context::unbindBel, conv_from_str<BelId>>::def_wrap(
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ctx_cls, "unbindBel");
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fn_wrapper_1a<Context, decltype(&Context::getBoundBelCell), &Context::getBoundBelCell, deref_and_wrap<CellInfo>,
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conv_from_str<BelId>>::def_wrap(ctx_cls, "getBoundBelCell");
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fn_wrapper_1a<Context, decltype(&Context::getConflictingBelCell), &Context::getConflictingBelCell,
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deref_and_wrap<CellInfo>, conv_from_str<BelId>>::def_wrap(ctx_cls, "getConflictingBelCell");
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fn_wrapper_0a<Context, decltype(&Context::getBels), &Context::getBels, wrap_context<BelRange>>::def_wrap(ctx_cls,
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"getBels");
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fn_wrapper_2a<Context, decltype(&Context::getBelPinWire), &Context::getBelPinWire, conv_to_str<WireId>,
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conv_from_str<BelId>, conv_from_str<IdString>>::def_wrap(ctx_cls, "getBelPinWire");
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fn_wrapper_1a<Context, decltype(&Context::getWireBelPins), &Context::getWireBelPins, wrap_context<BelPinRange>,
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conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireBelPins");
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fn_wrapper_1a<Context, decltype(&Context::getWireChecksum), &Context::getWireChecksum, pass_through<uint32_t>,
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conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireChecksum");
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fn_wrapper_3a_v<Context, decltype(&Context::bindWire), &Context::bindWire, conv_from_str<WireId>,
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addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindWire");
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fn_wrapper_1a_v<Context, decltype(&Context::unbindWire), &Context::unbindWire, conv_from_str<WireId>>::def_wrap(
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ctx_cls, "unbindWire");
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fn_wrapper_1a<Context, decltype(&Context::checkWireAvail), &Context::checkWireAvail, pass_through<bool>,
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conv_from_str<WireId>>::def_wrap(ctx_cls, "checkWireAvail");
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fn_wrapper_1a<Context, decltype(&Context::getBoundWireNet), &Context::getBoundWireNet, deref_and_wrap<NetInfo>,
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conv_from_str<WireId>>::def_wrap(ctx_cls, "getBoundWireNet");
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fn_wrapper_1a<Context, decltype(&Context::getConflictingWireNet), &Context::getConflictingWireNet,
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deref_and_wrap<NetInfo>, conv_from_str<WireId>>::def_wrap(ctx_cls, "getConflictingWireNet");
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fn_wrapper_0a<Context, decltype(&Context::getWires), &Context::getWires, wrap_context<WireRange>>::def_wrap(
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ctx_cls, "getWires");
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fn_wrapper_0a<Context, decltype(&Context::getPips), &Context::getPips, wrap_context<AllPipRange>>::def_wrap(
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ctx_cls, "getPips");
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fn_wrapper_1a<Context, decltype(&Context::getPipChecksum), &Context::getPipChecksum, pass_through<uint32_t>,
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conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipChecksum");
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fn_wrapper_3a_v<Context, decltype(&Context::bindPip), &Context::bindPip, conv_from_str<PipId>,
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addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindPip");
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fn_wrapper_1a_v<Context, decltype(&Context::unbindPip), &Context::unbindPip, conv_from_str<PipId>>::def_wrap(
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ctx_cls, "unbindPip");
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fn_wrapper_1a<Context, decltype(&Context::checkPipAvail), &Context::checkPipAvail, pass_through<bool>,
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conv_from_str<PipId>>::def_wrap(ctx_cls, "checkPipAvail");
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fn_wrapper_1a<Context, decltype(&Context::getBoundPipNet), &Context::getBoundPipNet, deref_and_wrap<NetInfo>,
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conv_from_str<PipId>>::def_wrap(ctx_cls, "getBoundPipNet");
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fn_wrapper_1a<Context, decltype(&Context::getConflictingPipNet), &Context::getConflictingPipNet,
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deref_and_wrap<NetInfo>, conv_from_str<PipId>>::def_wrap(ctx_cls, "getConflictingPipNet");
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fn_wrapper_1a<Context, decltype(&Context::getPipsDownhill), &Context::getPipsDownhill, wrap_context<PipRange>,
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conv_from_str<WireId>>::def_wrap(ctx_cls, "getPipsDownhill");
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fn_wrapper_1a<Context, decltype(&Context::getPipsUphill), &Context::getPipsUphill, wrap_context<PipRange>,
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conv_from_str<WireId>>::def_wrap(ctx_cls, "getPipsUphill");
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fn_wrapper_1a<Context, decltype(&Context::getWireAliases), &Context::getWireAliases, wrap_context<PipRange>,
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conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireAliases");
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fn_wrapper_1a<Context, decltype(&Context::getPipSrcWire), &Context::getPipSrcWire, conv_to_str<WireId>,
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conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipSrcWire");
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fn_wrapper_1a<Context, decltype(&Context::getPipDstWire), &Context::getPipDstWire, conv_to_str<WireId>,
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conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipDstWire");
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fn_wrapper_1a<Context, decltype(&Context::getPipDelay), &Context::getPipDelay, pass_through<DelayInfo>,
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conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipDelay");
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fn_wrapper_1a<Context, decltype(&Context::getPackagePinBel), &Context::getPackagePinBel, conv_to_str<BelId>,
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pass_through<std::string>>::def_wrap(ctx_cls, "getPackagePinBel");
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fn_wrapper_1a<Context, decltype(&Context::getBelPackagePin), &Context::getBelPackagePin, pass_through<std::string>,
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conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelPackagePin");
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fn_wrapper_0a<Context, decltype(&Context::getChipName), &Context::getChipName, pass_through<std::string>>::def_wrap(
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ctx_cls, "getChipName");
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fn_wrapper_0a<Context, decltype(&Context::archId), &Context::archId, conv_to_str<IdString>>::def_wrap(ctx_cls,
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"archId");
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@ -19,6 +19,7 @@
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#include "nextpnr.h"
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#include <boost/algorithm/string.hpp>
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#include "design_utils.h"
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#include "log.h"
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NEXTPNR_NAMESPACE_BEGIN
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@ -144,6 +145,27 @@ Property::Property(const std::string &strval) : is_string(true), str(strval), in
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Property::Property(State bit) : is_string(false), str(std::string("") + char(bit)), intval(bit == S1) {}
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void CellInfo::addInput(IdString name)
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{
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ports[name].name = name;
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ports[name].type = PORT_IN;
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}
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void CellInfo::addOutput(IdString name)
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{
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ports[name].name = name;
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ports[name].type = PORT_OUT;
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}
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void CellInfo::addInout(IdString name)
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{
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ports[name].name = name;
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ports[name].type = PORT_INOUT;
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}
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void CellInfo::setParam(IdString name, Property value) { params[name] = value; }
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void CellInfo::unsetParam(IdString name) { params.erase(name); }
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void CellInfo::setAttr(IdString name, Property value) { attrs[name] = value; }
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void CellInfo::unsetAttr(IdString name) { attrs.erase(name); }
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std::string Property::to_string() const
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{
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if (is_string) {
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@ -638,4 +660,67 @@ void BaseCtx::attributesToArchInfo()
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getCtx()->assignArchInfo();
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}
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NetInfo *BaseCtx::createNet(IdString name)
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{
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NPNR_ASSERT(!nets.count(name));
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NPNR_ASSERT(!net_aliases.count(name));
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std::unique_ptr<NetInfo> net{new NetInfo};
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net->name = name;
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net_aliases[name] = name;
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NetInfo *ptr = net.get();
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nets[name] = std::move(net);
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refreshUi();
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return ptr;
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}
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void BaseCtx::connectPort(IdString net, IdString cell, IdString port)
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{
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NetInfo *net_info = getNetByAlias(net);
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CellInfo *cell_info = cells.at(cell).get();
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connect_port(getCtx(), net_info, cell_info, port);
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}
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void BaseCtx::disconnectPort(IdString cell, IdString port)
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{
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CellInfo *cell_info = cells.at(cell).get();
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disconnect_port(getCtx(), cell_info, port);
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}
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void BaseCtx::ripupNet(IdString name)
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{
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NetInfo *net_info = getNetByAlias(name);
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std::vector<WireId> to_unbind;
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for (auto &wire : net_info->wires)
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to_unbind.push_back(wire.first);
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for (auto &unbind : to_unbind)
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getCtx()->unbindWire(unbind);
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}
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void BaseCtx::lockNetRouting(IdString name)
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{
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NetInfo *net_info = getNetByAlias(name);
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for (auto &wire : net_info->wires)
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wire.second.strength = STRENGTH_USER;
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}
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CellInfo *BaseCtx::createCell(IdString name, IdString type)
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{
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NPNR_ASSERT(!cells.count(name));
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std::unique_ptr<CellInfo> cell{new CellInfo};
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cell->name = name;
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cell->type = type;
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CellInfo *ptr = cell.get();
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cells[name] = std::move(cell);
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refreshUi();
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return ptr;
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}
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void BaseCtx::copyBelPorts(IdString cell, BelId bel)
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{
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CellInfo *cell_info = cells.at(cell).get();
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for (auto pin : getCtx()->getBelPins(bel)) {
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cell_info->ports[pin].name = pin;
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cell_info->ports[pin].type = getCtx()->getBelPinType(bel, pin);
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}
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}
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NEXTPNR_NAMESPACE_END
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@ -445,6 +445,15 @@ struct CellInfo : ArchCellInfo
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Region *region = nullptr;
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TimingConstrObjectId tmg_id;
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void addInput(IdString name);
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void addOutput(IdString name);
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void addInout(IdString name);
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void setParam(IdString name, Property value);
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void unsetParam(IdString name);
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void setAttr(IdString name, Property value);
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void unsetAttr(IdString name);
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};
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enum TimingPortClass
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@ -741,7 +750,10 @@ struct BaseCtx
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TimingConstrObjectId timingCellObject(CellInfo *cell);
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TimingConstrObjectId timingPortObject(CellInfo *cell, IdString port);
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NetInfo *getNetByAlias(IdString alias) const { return nets.at(net_aliases.at(alias)).get(); }
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NetInfo *getNetByAlias(IdString alias) const
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{
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return nets.count(alias) ? nets.at(alias).get() : nets.at(net_aliases.at(alias)).get();
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}
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void addConstraint(std::unique_ptr<TimingConstraint> constr);
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void removeConstraint(IdString constrName);
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@ -752,6 +764,16 @@ struct BaseCtx
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void addBelToRegion(IdString name, BelId bel);
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void constrainCellToRegion(IdString cell, IdString region_name);
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// Helper functions for Python bindings
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NetInfo *createNet(IdString name);
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void connectPort(IdString net, IdString cell, IdString port);
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void disconnectPort(IdString cell, IdString port);
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void ripupNet(IdString name);
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void lockNetRouting(IdString name);
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CellInfo *createCell(IdString name, IdString type);
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void copyBelPorts(IdString cell, BelId bel);
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// Workaround for lack of wrappable constructors
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DecalXY constructDecalXY(DecalId decal, float x, float y);
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@ -160,6 +160,22 @@ BOOST_PYTHON_MODULE(MODULE_NAME)
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readonly_wrapper<CellInfo &, decltype(&CellInfo::pins), &CellInfo::pins, wrap_context<PinMap &>>::def_wrap(ci_cls,
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"pins");
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fn_wrapper_1a_v<CellInfo &, decltype(&CellInfo::addInput), &CellInfo::addInput, conv_from_str<IdString>>::def_wrap(
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ci_cls, "addInput");
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fn_wrapper_1a_v<CellInfo &, decltype(&CellInfo::addOutput), &CellInfo::addOutput,
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conv_from_str<IdString>>::def_wrap(ci_cls, "addOutput");
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fn_wrapper_1a_v<CellInfo &, decltype(&CellInfo::addInout), &CellInfo::addInout, conv_from_str<IdString>>::def_wrap(
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ci_cls, "addInout");
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fn_wrapper_2a_v<CellInfo &, decltype(&CellInfo::setParam), &CellInfo::setParam, conv_from_str<IdString>,
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conv_from_str<Property>>::def_wrap(ci_cls, "setParam");
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fn_wrapper_1a_v<CellInfo &, decltype(&CellInfo::unsetParam), &CellInfo::unsetParam,
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conv_from_str<IdString>>::def_wrap(ci_cls, "unsetParam");
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fn_wrapper_2a_v<CellInfo &, decltype(&CellInfo::setAttr), &CellInfo::setAttr, conv_from_str<IdString>,
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conv_from_str<Property>>::def_wrap(ci_cls, "setAttr");
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fn_wrapper_1a_v<CellInfo &, decltype(&CellInfo::unsetAttr), &CellInfo::unsetAttr,
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conv_from_str<IdString>>::def_wrap(ci_cls, "unsetAttr");
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auto pi_cls = class_<ContextualWrapper<PortInfo &>>("PortInfo", no_init);
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readwrite_wrapper<PortInfo &, decltype(&PortInfo::name), &PortInfo::name, conv_to_str<IdString>,
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conv_from_str<IdString>>::def_wrap(pi_cls, "name");
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87
docs/python.md
Normal file
87
docs/python.md
Normal file
@ -0,0 +1,87 @@
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# Using the Python API
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nextpnr provides Python bindings to its internal APIs to enable customisation of the FPGA CAD flow.
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If you are interested in using Python to describe the FPGA rather than customise or explore the flow, see the [nextpnr Generic Architecture](generic.md) documentation.
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## Running Python Scripts
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Python scripts can be run at any point in the flow. The following command line arguments are used to run a script:
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- **--pre-pack script.py**: after reading the JSON, before packing
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- **--pre-place script.py**: after packing, before placement
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- **--pre-route script.py**: after placement, before routing
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- **--post-route script.py**: after routing, before bitstream generation
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## Binding Overview
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The internal `Context` object providing access to the FPGA architecture and netlist is exposed automatically to the script as a global variable `ctx`.
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Internally, nextpnr uses a fast indexed string pool called `IdString`. This is automatically and transparently converted to/from Python strings by the Python binding layer.
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Likewise, the architecture identifiers `BelId`, `WireId` and `PipId` are also translated to/from Python strings containing the object name automatically.
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To query the FPGA architecture, use the functions described in the [Architecture API documentation](archapi.md). Ranges can be iterated over in the same way as any other Python range.
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## Netlist Access
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### Accessing nets
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There is a dictionary `ctx.nets` that provides access to all of the nets in a design by name. Each net item has the following fields:
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- `name`: name of the net
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- `wires`: a map of wires used by the net; from wire to the pip driving that wire
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- `driver`: a `PortRef` for the net's driving (source) port
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- `users`: a list of `PortRef`s for the net's sink ports
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- `attrs`: a read-only dictionary of attributes on the net
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A `PortRef` has three fields:
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- `cell`: a reference to the cell the port is on
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- `port`: the name of the port
|
||||
- `budget`: the timing budget of the port
|
||||
|
||||
### Accessing cells
|
||||
|
||||
There is a dictionary `ctx.cells` that provides access to all of the cells in a design by name. Each cell item has the following fields:
|
||||
|
||||
- `name`: name of the cell
|
||||
- `type`: type of the cell
|
||||
- `ports`: a read-only dictionary of ports on the cell. Each port has the following fields:
|
||||
- `name`: name of the port
|
||||
- `net`: reference to the connected net, or `None` if disconnected
|
||||
- `type`: direction of the port
|
||||
- `params`: a read-only dictionary of parameters on the cell
|
||||
- `attrs`: a read-only dictionary of attributes on the cell
|
||||
- `bel`: the Bel the cell is placed on
|
||||
|
||||
Cells also have the following member functions:
|
||||
- `addInput(name)`: add a new input port with a given name
|
||||
- `addOutput(name)`: add a new output port with a given name
|
||||
- `addInout(name)`: add a new bidirectional port with a given name
|
||||
- `setParam(name, value)`: set a parameter on a cell to a given value
|
||||
- `unsetParam(name)`: remove a parameter from the cell
|
||||
- `setAttr(name, value)`: set an attribute on a cell to a given value
|
||||
- `unsetAttr(name)`: remove an attribute from the cell
|
||||
|
||||
The value given to `setParam` and `setAttr` should be a string of `[01xz]*` for four-state bitvectors and numerical values. Other values will be interpreted as a textual string. Textual strings of only `[01xz]* *` should have an extra space added at the end which will be stripped off and avoids any ambiguous cases between strings and four-state bitvectors.
|
||||
|
||||
### Creating Objects
|
||||
|
||||
`ctx` has two functions for creating new netlist objects. Both return the created object:
|
||||
- `createNet(name)`
|
||||
- `createCell(name, type)` (note this creates an empty cell, ports must be added separately)
|
||||
|
||||
### Other manipulations
|
||||
|
||||
`ctx` has some other helper functions for netlist manipulations:
|
||||
|
||||
- `connectPort(netname, cellname, portname)`: connect a cell port to a net
|
||||
- `disconnectPort(cellname, portname)`: disconnect a cell port from its net
|
||||
- `ripupNet(netname)`: remove all routing from a net (but keep netlist connections intact)
|
||||
- `lockNetRouting(netname)`: set the routing of a net as fixed
|
||||
- `copyBelPorts(cellname, belname)`: replicate the port definitions of a Bel onto a cell (useful for creating standard cells, as `createCell` doesn't create any ports).
|
||||
|
||||
## Constraints
|
||||
|
||||
See the [constraints documentation](constraints.md)
|
||||
|
||||
@ -46,110 +46,16 @@ void arch_wrap_python()
|
||||
.def("place", &Context::place)
|
||||
.def("route", &Context::route);
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBelType), &Context::getBelType, conv_to_str<IdString>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelType");
|
||||
fn_wrapper_1a<Context, decltype(&Context::checkBelAvail), &Context::checkBelAvail, pass_through<bool>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "checkBelAvail");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBelChecksum), &Context::getBelChecksum, pass_through<uint32_t>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelChecksum");
|
||||
fn_wrapper_3a_v<Context, decltype(&Context::bindBel), &Context::bindBel, conv_from_str<BelId>,
|
||||
addr_and_unwrap<CellInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindBel");
|
||||
fn_wrapper_1a_v<Context, decltype(&Context::unbindBel), &Context::unbindBel, conv_from_str<BelId>>::def_wrap(
|
||||
ctx_cls, "unbindBel");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBoundBelCell), &Context::getBoundBelCell, deref_and_wrap<CellInfo>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBoundBelCell");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getConflictingBelCell), &Context::getConflictingBelCell,
|
||||
deref_and_wrap<CellInfo>, conv_from_str<BelId>>::def_wrap(ctx_cls, "getConflictingBelCell");
|
||||
fn_wrapper_0a<Context, decltype(&Context::getBels), &Context::getBels, wrap_context<BelRange>>::def_wrap(ctx_cls,
|
||||
"getBels");
|
||||
|
||||
fn_wrapper_2a<Context, decltype(&Context::getBelPinWire), &Context::getBelPinWire, conv_to_str<WireId>,
|
||||
conv_from_str<BelId>, conv_from_str<IdString>>::def_wrap(ctx_cls, "getBelPinWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getWireBelPins), &Context::getWireBelPins, wrap_context<BelPinRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireBelPins");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getWireChecksum), &Context::getWireChecksum, pass_through<uint32_t>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireChecksum");
|
||||
fn_wrapper_3a_v<Context, decltype(&Context::bindWire), &Context::bindWire, conv_from_str<WireId>,
|
||||
addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindWire");
|
||||
fn_wrapper_1a_v<Context, decltype(&Context::unbindWire), &Context::unbindWire, conv_from_str<WireId>>::def_wrap(
|
||||
ctx_cls, "unbindWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::checkWireAvail), &Context::checkWireAvail, pass_through<bool>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "checkWireAvail");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBoundWireNet), &Context::getBoundWireNet, deref_and_wrap<NetInfo>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getBoundWireNet");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getConflictingWireNet), &Context::getConflictingWireNet,
|
||||
deref_and_wrap<NetInfo>, conv_from_str<WireId>>::def_wrap(ctx_cls, "getConflictingWireNet");
|
||||
|
||||
fn_wrapper_0a<Context, decltype(&Context::getWires), &Context::getWires, wrap_context<WireRange>>::def_wrap(
|
||||
ctx_cls, "getWires");
|
||||
|
||||
fn_wrapper_0a<Context, decltype(&Context::getPips), &Context::getPips, wrap_context<AllPipRange>>::def_wrap(
|
||||
ctx_cls, "getPips");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipChecksum), &Context::getPipChecksum, pass_through<uint32_t>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipChecksum");
|
||||
fn_wrapper_3a_v<Context, decltype(&Context::bindPip), &Context::bindPip, conv_from_str<PipId>,
|
||||
addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindPip");
|
||||
fn_wrapper_1a_v<Context, decltype(&Context::unbindPip), &Context::unbindPip, conv_from_str<PipId>>::def_wrap(
|
||||
ctx_cls, "unbindPip");
|
||||
fn_wrapper_1a<Context, decltype(&Context::checkPipAvail), &Context::checkPipAvail, pass_through<bool>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "checkPipAvail");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBoundPipNet), &Context::getBoundPipNet, deref_and_wrap<NetInfo>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getBoundPipNet");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getConflictingPipNet), &Context::getConflictingPipNet,
|
||||
deref_and_wrap<NetInfo>, conv_from_str<PipId>>::def_wrap(ctx_cls, "getConflictingPipNet");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipsDownhill), &Context::getPipsDownhill, wrap_context<PipRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getPipsDownhill");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipsUphill), &Context::getPipsUphill, wrap_context<PipRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getPipsUphill");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getWireAliases), &Context::getWireAliases, wrap_context<PipRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireAliases");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipSrcWire), &Context::getPipSrcWire, conv_to_str<WireId>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipSrcWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipDstWire), &Context::getPipDstWire, conv_to_str<WireId>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipDstWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipDelay), &Context::getPipDelay, pass_through<DelayInfo>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipDelay");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPackagePinBel), &Context::getPackagePinBel, conv_to_str<BelId>,
|
||||
pass_through<std::string>>::def_wrap(ctx_cls, "getPackagePinBel");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBelPackagePin), &Context::getBelPackagePin, pass_through<std::string>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelPackagePin");
|
||||
|
||||
fn_wrapper_0a<Context, decltype(&Context::getChipName), &Context::getChipName, pass_through<std::string>>::def_wrap(
|
||||
ctx_cls, "getChipName");
|
||||
fn_wrapper_0a<Context, decltype(&Context::archId), &Context::archId, conv_to_str<IdString>>::def_wrap(ctx_cls,
|
||||
"archId");
|
||||
|
||||
typedef std::unordered_map<IdString, std::unique_ptr<CellInfo>> CellMap;
|
||||
typedef std::unordered_map<IdString, std::unique_ptr<NetInfo>> NetMap;
|
||||
typedef std::unordered_map<IdString, IdString> AliasMap;
|
||||
|
||||
readonly_wrapper<Context, decltype(&Context::cells), &Context::cells, wrap_context<CellMap &>>::def_wrap(ctx_cls,
|
||||
"cells");
|
||||
readonly_wrapper<Context, decltype(&Context::nets), &Context::nets, wrap_context<NetMap &>>::def_wrap(ctx_cls,
|
||||
"nets");
|
||||
readonly_wrapper<Context, decltype(&Context::net_aliases), &Context::net_aliases,
|
||||
wrap_context<AliasMap &>>::def_wrap(ctx_cls, "net_aliases");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getNetByAlias), &Context::getNetByAlias, deref_and_wrap<NetInfo>,
|
||||
conv_from_str<IdString>>::def_wrap(ctx_cls, "getNetByAlias");
|
||||
fn_wrapper_2a_v<Context, decltype(&Context::addClock), &Context::addClock, conv_from_str<IdString>,
|
||||
pass_through<float>>::def_wrap(ctx_cls, "addClock");
|
||||
fn_wrapper_5a_v<Context, decltype(&Context::createRectangularRegion), &Context::createRectangularRegion,
|
||||
conv_from_str<IdString>, pass_through<int>, pass_through<int>, pass_through<int>,
|
||||
pass_through<int>>::def_wrap(ctx_cls, "createRectangularRegion");
|
||||
fn_wrapper_2a_v<Context, decltype(&Context::addBelToRegion), &Context::addBelToRegion, conv_from_str<IdString>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "addBelToRegion");
|
||||
fn_wrapper_2a_v<Context, decltype(&Context::constrainCellToRegion), &Context::constrainCellToRegion,
|
||||
conv_from_str<IdString>, conv_from_str<IdString>>::def_wrap(ctx_cls, "constrainCellToRegion");
|
||||
|
||||
auto belpin_cls = class_<ContextualWrapper<BelPin>>("BelPin", no_init);
|
||||
readonly_wrapper<BelPin, decltype(&BelPin::bel), &BelPin::bel, conv_to_str<BelId>>::def_wrap(belpin_cls, "bel");
|
||||
readonly_wrapper<BelPin, decltype(&BelPin::pin), &BelPin::pin, conv_to_str<IdString>>::def_wrap(belpin_cls, "pin");
|
||||
|
||||
#include "arch_pybindings_shared.h"
|
||||
|
||||
WRAP_RANGE(Bel, conv_to_str<BelId>);
|
||||
WRAP_RANGE(Wire, conv_to_str<WireId>);
|
||||
WRAP_RANGE(AllPip, conv_to_str<PipId>);
|
||||
|
||||
@ -57,110 +57,16 @@ void arch_wrap_python()
|
||||
.def("place", &Context::place)
|
||||
.def("route", &Context::route);
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBelType), &Context::getBelType, conv_to_str<IdString>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelType");
|
||||
fn_wrapper_1a<Context, decltype(&Context::checkBelAvail), &Context::checkBelAvail, pass_through<bool>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "checkBelAvail");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBelChecksum), &Context::getBelChecksum, pass_through<uint32_t>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelChecksum");
|
||||
fn_wrapper_3a_v<Context, decltype(&Context::bindBel), &Context::bindBel, conv_from_str<BelId>,
|
||||
addr_and_unwrap<CellInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindBel");
|
||||
fn_wrapper_1a_v<Context, decltype(&Context::unbindBel), &Context::unbindBel, conv_from_str<BelId>>::def_wrap(
|
||||
ctx_cls, "unbindBel");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBoundBelCell), &Context::getBoundBelCell, deref_and_wrap<CellInfo>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBoundBelCell");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getConflictingBelCell), &Context::getConflictingBelCell,
|
||||
deref_and_wrap<CellInfo>, conv_from_str<BelId>>::def_wrap(ctx_cls, "getConflictingBelCell");
|
||||
fn_wrapper_0a<Context, decltype(&Context::getBels), &Context::getBels, wrap_context<BelRange>>::def_wrap(ctx_cls,
|
||||
"getBels");
|
||||
|
||||
fn_wrapper_2a<Context, decltype(&Context::getBelPinWire), &Context::getBelPinWire, conv_to_str<WireId>,
|
||||
conv_from_str<BelId>, conv_from_str<IdString>>::def_wrap(ctx_cls, "getBelPinWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getWireBelPins), &Context::getWireBelPins, wrap_context<BelPinRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireBelPins");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getWireChecksum), &Context::getWireChecksum, pass_through<uint32_t>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireChecksum");
|
||||
fn_wrapper_3a_v<Context, decltype(&Context::bindWire), &Context::bindWire, conv_from_str<WireId>,
|
||||
addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindWire");
|
||||
fn_wrapper_1a_v<Context, decltype(&Context::unbindWire), &Context::unbindWire, conv_from_str<WireId>>::def_wrap(
|
||||
ctx_cls, "unbindWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::checkWireAvail), &Context::checkWireAvail, pass_through<bool>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "checkWireAvail");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBoundWireNet), &Context::getBoundWireNet, deref_and_wrap<NetInfo>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getBoundWireNet");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getConflictingWireNet), &Context::getConflictingWireNet,
|
||||
deref_and_wrap<NetInfo>, conv_from_str<WireId>>::def_wrap(ctx_cls, "getConflictingWireNet");
|
||||
|
||||
fn_wrapper_0a<Context, decltype(&Context::getWires), &Context::getWires, wrap_context<WireRange>>::def_wrap(
|
||||
ctx_cls, "getWires");
|
||||
|
||||
fn_wrapper_0a<Context, decltype(&Context::getPips), &Context::getPips, wrap_context<AllPipRange>>::def_wrap(
|
||||
ctx_cls, "getPips");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipChecksum), &Context::getPipChecksum, pass_through<uint32_t>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipChecksum");
|
||||
fn_wrapper_3a_v<Context, decltype(&Context::bindPip), &Context::bindPip, conv_from_str<PipId>,
|
||||
addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindPip");
|
||||
fn_wrapper_1a_v<Context, decltype(&Context::unbindPip), &Context::unbindPip, conv_from_str<PipId>>::def_wrap(
|
||||
ctx_cls, "unbindPip");
|
||||
fn_wrapper_1a<Context, decltype(&Context::checkPipAvail), &Context::checkPipAvail, pass_through<bool>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "checkPipAvail");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBoundPipNet), &Context::getBoundPipNet, deref_and_wrap<NetInfo>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getBoundPipNet");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getConflictingPipNet), &Context::getConflictingPipNet,
|
||||
deref_and_wrap<NetInfo>, conv_from_str<PipId>>::def_wrap(ctx_cls, "getConflictingPipNet");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipsDownhill), &Context::getPipsDownhill, wrap_context<PipRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getPipsDownhill");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipsUphill), &Context::getPipsUphill, wrap_context<PipRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getPipsUphill");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getWireAliases), &Context::getWireAliases, wrap_context<PipRange>,
|
||||
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireAliases");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipSrcWire), &Context::getPipSrcWire, conv_to_str<WireId>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipSrcWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipDstWire), &Context::getPipDstWire, conv_to_str<WireId>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipDstWire");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPipDelay), &Context::getPipDelay, pass_through<DelayInfo>,
|
||||
conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipDelay");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getPackagePinBel), &Context::getPackagePinBel, conv_to_str<BelId>,
|
||||
pass_through<std::string>>::def_wrap(ctx_cls, "getPackagePinBel");
|
||||
fn_wrapper_1a<Context, decltype(&Context::getBelPackagePin), &Context::getBelPackagePin, pass_through<std::string>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelPackagePin");
|
||||
|
||||
fn_wrapper_0a<Context, decltype(&Context::getChipName), &Context::getChipName, pass_through<std::string>>::def_wrap(
|
||||
ctx_cls, "getChipName");
|
||||
fn_wrapper_0a<Context, decltype(&Context::archId), &Context::archId, conv_to_str<IdString>>::def_wrap(ctx_cls,
|
||||
"archId");
|
||||
|
||||
typedef std::unordered_map<IdString, std::unique_ptr<CellInfo>> CellMap;
|
||||
typedef std::unordered_map<IdString, std::unique_ptr<NetInfo>> NetMap;
|
||||
typedef std::unordered_map<IdString, IdString> AliasMap;
|
||||
|
||||
readonly_wrapper<Context, decltype(&Context::cells), &Context::cells, wrap_context<CellMap &>>::def_wrap(ctx_cls,
|
||||
"cells");
|
||||
readonly_wrapper<Context, decltype(&Context::nets), &Context::nets, wrap_context<NetMap &>>::def_wrap(ctx_cls,
|
||||
"nets");
|
||||
readonly_wrapper<Context, decltype(&Context::net_aliases), &Context::net_aliases,
|
||||
wrap_context<AliasMap &>>::def_wrap(ctx_cls, "net_aliases");
|
||||
|
||||
fn_wrapper_1a<Context, decltype(&Context::getNetByAlias), &Context::getNetByAlias, deref_and_wrap<NetInfo>,
|
||||
conv_from_str<IdString>>::def_wrap(ctx_cls, "getNetByAlias");
|
||||
fn_wrapper_2a_v<Context, decltype(&Context::addClock), &Context::addClock, conv_from_str<IdString>,
|
||||
pass_through<float>>::def_wrap(ctx_cls, "addClock");
|
||||
fn_wrapper_5a_v<Context, decltype(&Context::createRectangularRegion), &Context::createRectangularRegion,
|
||||
conv_from_str<IdString>, pass_through<int>, pass_through<int>, pass_through<int>,
|
||||
pass_through<int>>::def_wrap(ctx_cls, "createRectangularRegion");
|
||||
fn_wrapper_2a_v<Context, decltype(&Context::addBelToRegion), &Context::addBelToRegion, conv_from_str<IdString>,
|
||||
conv_from_str<BelId>>::def_wrap(ctx_cls, "addBelToRegion");
|
||||
fn_wrapper_2a_v<Context, decltype(&Context::constrainCellToRegion), &Context::constrainCellToRegion,
|
||||
conv_from_str<IdString>, conv_from_str<IdString>>::def_wrap(ctx_cls, "constrainCellToRegion");
|
||||
|
||||
auto belpin_cls = class_<ContextualWrapper<BelPin>>("BelPin", no_init);
|
||||
readonly_wrapper<BelPin, decltype(&BelPin::bel), &BelPin::bel, conv_to_str<BelId>>::def_wrap(belpin_cls, "bel");
|
||||
readonly_wrapper<BelPin, decltype(&BelPin::pin), &BelPin::pin, conv_to_str<IdString>>::def_wrap(belpin_cls, "pin");
|
||||
|
||||
#include "arch_pybindings_shared.h"
|
||||
|
||||
WRAP_RANGE(Bel, conv_to_str<BelId>);
|
||||
WRAP_RANGE(Wire, conv_to_str<WireId>);
|
||||
WRAP_RANGE(AllPip, conv_to_str<PipId>);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user