diff --git a/himbaechel/uarch/gatemate/gen/arch_gen.py b/himbaechel/uarch/gatemate/gen/arch_gen.py
index ce2722df..6af7beb4 100644
--- a/himbaechel/uarch/gatemate/gen/arch_gen.py
+++ b/himbaechel/uarch/gatemate/gen/arch_gen.py
@@ -85,10 +85,10 @@ def main():
         if "GPIO" in type_name:
             tt.create_wire("GPIO.OUT_D1", "WIRE_INTERNAL")
             tt.create_wire("GPIO.OUT_D2", "WIRE_INTERNAL")
-            tt.create_wire("GPIO.OUT_Q1", "WIRE_INTERNAL")
-            tt.create_wire("GPIO.OUT_Q2", "WIRE_INTERNAL")
-            tt.create_wire("GPIO.OUT_CLK","WIRE_INTERNAL")
-            tt.create_wire("GPIO.CLK_INT","WIRE_INTERNAL")
+            #tt.create_wire("GPIO.OUT_Q1", "WIRE_INTERNAL")
+            #tt.create_wire("GPIO.OUT_Q2", "WIRE_INTERNAL")
+            #tt.create_wire("GPIO.OUT_CLK","WIRE_INTERNAL")
+            #tt.create_wire("GPIO.CLK_INT","WIRE_INTERNAL")
 
             pp = tt.create_pip("GPIO.OUT1", "GPIO.OUT_D1")
             pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT1_4"), 1, 0, False)
@@ -113,46 +113,43 @@ def main():
             pp = tt.create_pip("GPIO.OUT4","GPIO.OE")
             pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OE_SIGNAL"), 2, 3, False)
 
-            pp = tt.create_pip("GPIO.OUT4", "GPIO.CLK_INT")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.CLK_1_4"), 1, 0, False)
-            pp = tt.create_pip("GPIO.OUT1", "GPIO.CLK_INT")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.CLK_1_4"), 1, 1, False)
+            #pp = tt.create_pip("GPIO.OUT4", "GPIO.CLK_INT")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.CLK_1_4"), 1, 0, False)
+            #pp = tt.create_pip("GPIO.OUT1", "GPIO.CLK_INT")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.CLK_1_4"), 1, 1, False)
 
-            pp = tt.create_pip("GPIO.CLK_INT", "GPIO.OUT_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.SEL_OUT_CLOCK"), 1, 1, False)
-            pp = tt.create_pip("GPIO.CLOCK1", "GPIO.OUT_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 0, False)
-            pp = tt.create_pip("GPIO.CLOCK2", "GPIO.OUT_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 1, False)
-            pp = tt.create_pip("GPIO.CLOCK3", "GPIO.OUT_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 2, False)
-            pp = tt.create_pip("GPIO.CLOCK4", "GPIO.OUT_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 3, False)
+            #pp = tt.create_pip("GPIO.CLK_INT", "GPIO.OUT_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.SEL_OUT_CLOCK"), 1, 1, False)
+            #pp = tt.create_pip("GPIO.CLOCK1", "GPIO.OUT_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 0, False)
+            #pp = tt.create_pip("GPIO.CLOCK2", "GPIO.OUT_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 1, False)
+            #pp = tt.create_pip("GPIO.CLOCK3", "GPIO.OUT_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 2, False)
+            #pp = tt.create_pip("GPIO.CLOCK4", "GPIO.OUT_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.OUT_CLOCK"), 2, 3, False)
 
 
-            tt.create_wire("GPIO.IN_D1", "WIRE_INTERNAL")
-            tt.create_wire("GPIO.IN_D2", "WIRE_INTERNAL")
-            tt.create_wire("GPIO.IN_Q1", "WIRE_INTERNAL")
-            tt.create_wire("GPIO.IN_Q2", "WIRE_INTERNAL")
-            tt.create_wire("GPIO.IN_CLK","WIRE_INTERNAL")
-
-            pp = tt.create_pip("GPIO.CLK_INT", "GPIO.IN_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.SEL_IN_CLOCK"), 1, 1, False)
-            pp = tt.create_pip("GPIO.CLOCK1", "GPIO.IN_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 0, False)
-            pp = tt.create_pip("GPIO.CLOCK2", "GPIO.IN_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 1, False)
-            pp = tt.create_pip("GPIO.CLOCK3", "GPIO.IN_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 2, False)
-            pp = tt.create_pip("GPIO.CLOCK4", "GPIO.IN_CLK")
-            pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 3, False)
+            #tt.create_wire("GPIO.IN_D1", "WIRE_INTERNAL")
+            #tt.create_wire("GPIO.IN_D2", "WIRE_INTERNAL")
+            #tt.create_wire("GPIO.IN_Q1", "WIRE_INTERNAL")
+            #tt.create_wire("GPIO.IN_Q2", "WIRE_INTERNAL")
+            #tt.create_wire("GPIO.IN_CLK","WIRE_INTERNAL")
 
+            #pp = tt.create_pip("GPIO.CLK_INT", "GPIO.IN_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.SEL_IN_CLOCK"), 1, 1, False)
+            #pp = tt.create_pip("GPIO.CLOCK1", "GPIO.IN_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 0, False)
+            #pp = tt.create_pip("GPIO.CLOCK2", "GPIO.IN_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 1, False)
+            #pp = tt.create_pip("GPIO.CLOCK3", "GPIO.IN_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 2, False)
+            #pp = tt.create_pip("GPIO.CLOCK4", "GPIO.IN_CLK")
+            #pp.extra_data = PipExtraData(PIP_EXTRA_MUX,ch.strs.id("GPIO.IN_CLOCK"), 2, 3, False)
 
             tt.create_pip("GPIO.DI", "GPIO.IN1")
             tt.create_pip("GPIO.DI", "GPIO.IN2")
 
-
-
     # Setup tile grid
     for x in range(die.max_col() + 3):
         for y in range(die.max_row() + 3):