Added computing and reporting LUT mapping cache size

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>

fpga_interchange/site_lut_mapping_cache.cc

@@ -149,6 +149,21 @@ bool SiteLutMappingResult::apply (const SiteInformation& siteInfo) {
     return true;
 }
 
+size_t SiteLutMappingResult::getSizeInBytes () const {
+
+    size_t size = 0;
+
+    size += sizeof(SiteLutMappingResult);
+    size += blockedWires.size() * sizeof(std::pair<IdString, IdString>);
+
+    for (const auto& cell : cells) {
+        size += sizeof(Cell);
+        size += cell.belPins.size() * sizeof(decltype(cell.belPins)::value_type);
+    }
+
+    return size;
+}
+
 // ============================================================================
 
 void SiteLutMappingCache::add (const SiteLutMappingKey& key,

fpga_interchange/site_lut_mapping_cache.h

@@ -65,6 +65,10 @@ struct SiteLutMappingKey {
 
     static SiteLutMappingKey create (const SiteInformation& siteInfo);
 
+    size_t getSizeInBytes () const {
+        return sizeof(SiteLutMappingKey);
+    }
+
     void computeHash () {
         hash_ = mkhash(0, tileType);
         hash_ = mkhash(hash_, siteType);
@@ -128,6 +132,9 @@ struct SiteLutMappingResult {
 
     // Applies the mapping result to the site
     bool apply  (const SiteInformation& siteInfo);
+
+    // Returns size in bytes
+    size_t getSizeInBytes () const;
 };
 
 // Site LUT mapping cache object
@@ -144,6 +151,21 @@ public:
         return (float)numMisses / (float)(numHits + numMisses);
     }
 
+    size_t getCount () const {
+        return cache_.size();
+    }
+
+    size_t getSizeMB () const {
+        size_t size = 0;
+        for (const auto& it : cache_) {
+            size += it.first.getSizeInBytes();
+            size += it.second.getSizeInBytes();
+        }
+
+        const size_t MB = 1024L * 1024L;
+        return (size + MB - 1) / MB; // Round up to megabytes
+    }
+
 private:
 
     dict<SiteLutMappingKey, SiteLutMappingResult> cache_;