static/ice40: bug fixes for ultraplus

This commit is contained in:
Lofty 2023-12-09 04:12:33 +00:00 committed by myrtle
parent b4ca68c8ef
commit d1083fd348
3 changed files with 18 additions and 7 deletions

View File

@ -1267,7 +1267,7 @@ class StaticPlacer
penalty *= 1.025; penalty *= 1.025;
if (!legalised_ip) { if (!legalised_ip) {
float ip_overlap = 0; float ip_overlap = 0;
for (int i = 2; i < int(groups.size()); i++) for (int i = cfg.logic_groups; i < int(groups.size()); i++)
ip_overlap = std::max(ip_overlap, groups.at(i).overlap); ip_overlap = std::max(ip_overlap, groups.at(i).overlap);
if (ip_overlap < 0.15) { if (ip_overlap < 0.15) {
legalise_step(true); legalise_step(true);
@ -1275,7 +1275,7 @@ class StaticPlacer
} }
} else { } else {
float logic_overlap = 0; float logic_overlap = 0;
for (int i = 0; i < 2; i++) for (int i = 0; i < cfg.logic_groups; i++)
logic_overlap = std::max(logic_overlap, groups.at(i).overlap); logic_overlap = std::max(logic_overlap, groups.at(i).overlap);
if (logic_overlap < 0.1) { if (logic_overlap < 0.1) {
legalise_step(false); legalise_step(false);

View File

@ -61,8 +61,9 @@ struct PlacerStaticCfg
// estimate = c + mx*dx + my * dy // estimate = c + mx*dx + my * dy
delay_t timing_c = 100, timing_mx = 100, timing_my = 100; delay_t timing_c = 100, timing_mx = 100, timing_my = 100;
// groups of cells that should be placed together. // groups of cells that should be placed together.
// group 0 must be LUTs and group 1 must be FFs, further groups for BRAM/DSP/misc // groups < logic_groups are logic like LUTs and FFs, further groups for BRAM/DSP/misc
std::vector<StaticCellGroupCfg> cell_groups; std::vector<StaticCellGroupCfg> cell_groups;
int logic_groups = 2;
}; };
extern bool placer_static(Context *ctx, PlacerStaticCfg cfg); extern bool placer_static(Context *ctx, PlacerStaticCfg cfg);

View File

@ -653,6 +653,7 @@ bool Arch::place()
return false; return false;
} else if (placer == "static") { } else if (placer == "static") {
PlacerStaticCfg cfg(getCtx()); PlacerStaticCfg cfg(getCtx());
cfg.logic_groups = 1;
{ {
cfg.cell_groups.emplace_back(); cfg.cell_groups.emplace_back();
auto &comb = cfg.cell_groups.back(); auto &comb = cfg.cell_groups.back();
@ -671,6 +672,15 @@ bool Arch::place()
comb.spacer_rect = StaticRect(1.0f, 2.0f); comb.spacer_rect = StaticRect(1.0f, 2.0f);
} }
{
cfg.cell_groups.emplace_back();
auto& comb = cfg.cell_groups.back();
comb.name = getCtx()->id("DSP");
comb.cell_area[id_ICESTORM_DSP] = StaticRect(0.9f, 5.0f);
comb.bel_area[id_ICESTORM_DSP] = StaticRect(0.9f, 5.0f);
comb.spacer_rect = StaticRect(0.9f, 5.0f);
}
{ {
cfg.cell_groups.emplace_back(); cfg.cell_groups.emplace_back();
auto &comb = cfg.cell_groups.back(); auto &comb = cfg.cell_groups.back();
@ -684,9 +694,9 @@ bool Arch::place()
cfg.cell_groups.emplace_back(); cfg.cell_groups.emplace_back();
auto &comb = cfg.cell_groups.back(); auto &comb = cfg.cell_groups.back();
comb.name = getCtx()->id("WARMBOOT"); comb.name = getCtx()->id("WARMBOOT");
comb.cell_area[id_SB_WARMBOOT] = StaticRect(1.0f, 1.0f); comb.cell_area[id_SB_WARMBOOT] = StaticRect(0.5f, 1.0f);
comb.bel_area[id_SB_WARMBOOT] = StaticRect(1.0f, 1.0f); comb.bel_area[id_SB_WARMBOOT] = StaticRect(0.5f, 1.0f);
comb.spacer_rect = StaticRect(1.0f, 1.0f); comb.spacer_rect = StaticRect(0.5f, 1.0f);
} }
{ {
@ -695,7 +705,7 @@ bool Arch::place()
comb.name = getCtx()->id("IO"); comb.name = getCtx()->id("IO");
comb.cell_area[id_SB_IO] = StaticRect(0.5f, 0.5f); comb.cell_area[id_SB_IO] = StaticRect(0.5f, 0.5f);
comb.bel_area[id_SB_IO] = StaticRect(0.5f, 0.5f); comb.bel_area[id_SB_IO] = StaticRect(0.5f, 0.5f);
comb.spacer_rect = StaticRect(1.0f, 1.0f); comb.spacer_rect = StaticRect(0.5f, 0.5f);
} }
if (!placer_static(getCtx(), cfg)) if (!placer_static(getCtx(), cfg))
return false; return false;