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ice40: Fix order of values in error

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Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2021-07-10 23:23:19 +01:00
parent 6829e4c197
commit d290766101
1 changed files with 1 additions and 1 deletions
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2
ice40/pack.cc
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@ -1090,7 +1090,7 @@ void set_period(Context *ctx, CellInfo *ci, IdString port, delay_t period)
if (!equals_epsilon(to->clkconstr->period.maxDelay(), period))
log_warning(" Overriding derived constraint of %.1f MHz on net %s with user-specified constraint of "
"%.1f MHz.\n",
MHz(ctx, to->clkconstr->period.maxDelay()), to->name.c_str(ctx), MHz(ctx, period));
MHz(ctx, period), to->name.c_str(ctx), MHz(ctx, to->clkconstr->period.maxDelay()));
return;
}
to->clkconstr = std::unique_ptr<ClockConstraint>(new ClockConstraint());