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Move required attributes to pack

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This commit is contained in:
Eddie Hung 2018-11-29 15:38:28 -08:00
parent 6985e80c01
commit d8b6b231de
2 changed files with 30 additions and 32 deletions
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28
xc7/pack.cc
View File

@ -631,7 +631,33 @@ static void pack_special(Context *ctx)
for (auto cell : sorted(ctx->cells)) {
CellInfo *ci = cell.second;
if (is_sb_lfosc(ctx, ci)) {
if (ci->type == id_BUFGCTRL) {
ci->params.emplace(ctx->id("PRESELECT_I0"), "FALSE");
ci->params.emplace(ctx->id("CE0INV"), "CE0");
ci->params.emplace(ctx->id("S0INV"), "S0");
ci->params.emplace(ctx->id("IGNORE0INV"), "IGNORE0");
ci->params.emplace(ctx->id("CE1INV"), "CE1");
ci->params.emplace(ctx->id("S1INV"), "S1");
ci->params.emplace(ctx->id("IGNORE1INV"), "IGNORE1");
} else if (ci->type == id_MMCME2_ADV) {
ci->params.emplace(ctx->id("CLKINSELINV"), "CLKINSEL");
ci->params.emplace(ctx->id("PSENINV"), "PSEN");
ci->params.emplace(ctx->id("PSINCDECINV"), "PSINCDEC");
ci->params.emplace(ctx->id("PWRDWNINV"), "PWRDWN");
ci->params.emplace(ctx->id("RSTINV"), "RST");
ci->params.emplace(ctx->id("CLKIN2_PERIOD"), "0");
for (const auto& i : { "CLKOUT1_DIVIDE", "CLKOUT2_DIVIDE", "CLKOUT3_DIVIDE", "CLKOUT4_DIVIDE", "CLKOUT5_DIVIDE", "CLKOUT6_DIVIDE" }) {
ci->params.emplace(ctx->id(i), "1");
}
for (const auto& i : { "CLKOUT1_PHASE", "CLKOUT2_PHASE", "CLKOUT3_PHASE", "CLKOUT4_PHASE", "CLKOUT5_PHASE", "CLKOUT6_PHASE" }) {
ci->params.emplace(ctx->id(i), "0.0");
}
for (const auto& i : { "CLKOUT1_DUTY_CYCLE", "CLKOUT2_DUTY_CYCLE", "CLKOUT3_DUTY_CYCLE", "CLKOUT4_DUTY_CYCLE", "CLKOUT5_DUTY_CYCLE", "CLKOUT6_DUTY_CYCLE" }) {
ci->params.emplace(ctx->id(i), "0.5");
}
ci->params.emplace(ctx->id("REF_JITTER2"), "0.5");
ci->params.emplace(ctx->id("SS_MOD_PERIOD"), "10000");
} else if (is_sb_lfosc(ctx, ci)) {
std::unique_ptr<CellInfo> packed =
create_xc7_cell(ctx, ctx->id("ICESTORM_LFOSC"), ci->name.str(ctx) + "_OSC");
packed_cells.insert(ci->name);

34
xc7/xdl.cc
View File

@ -195,38 +195,10 @@ void write_xdl(const Context *ctx, std::ostream &out)
instPtr->setConfig("DRIVE", "", "12");
instPtr->setConfig("SLEW", "", "SLOW");
}
} else if (cell.second->type == id_BUFGCTRL) {
auto it = cell.second->params.find(ctx->id("PRESELECT_I0"));
instPtr->setConfig("PRESELECT_I0", "", it != cell.second->params.end() ? it->second : "FALSE");
instPtr->setConfig("CE0INV", "", "CE0");
instPtr->setConfig("S0INV", "", "S0");
//instPtr->setConfig("IGNORE0INV", "", "IGNORE0");
//instPtr->setConfig("CE1INV", "", "CE1");
//instPtr->setConfig("S1INV", "", "S1");
//instPtr->setConfig("IGNORE1INV", "", "IGNORE1");
} else if (cell.second->type == id_PS7) {
} else if (cell.second->type == id_MMCME2_ADV) {
for (const auto& i : cell.second->params) {
} else if (cell.second->type == id_BUFGCTRL || cell.second->type == id_MMCME2_ADV) {
for (const auto& i : cell.second->params)
instPtr->setConfig(i.first.str(ctx), "", i.second);
}
if (!cell.second->params.count(ctx->id("CLKIN2_PERIOD")))
instPtr->setConfig("CLKIN2_PERIOD", "", "0");
for (const auto& i : { "CLKOUT1_DIVIDE", "CLKOUT2_DIVIDE", "CLKOUT3_DIVIDE", "CLKOUT4_DIVIDE", "CLKOUT5_DIVIDE", "CLKOUT6_DIVIDE" }) {
if (!cell.second->params.count(ctx->id(i)))
instPtr->setConfig(i, "", "1");
}
for (const auto& i : { "CLKOUT1_PHASE", "CLKOUT2_PHASE", "CLKOUT3_PHASE", "CLKOUT4_PHASE", "CLKOUT5_PHASE", "CLKOUT6_PHASE" }) {
if (!cell.second->params.count(ctx->id(i)))
instPtr->setConfig(i, "", "0.0");
}
for (const auto& i : { "CLKOUT1_DUTY_CYCLE", "CLKOUT2_DUTY_CYCLE", "CLKOUT3_DUTY_CYCLE", "CLKOUT4_DUTY_CYCLE", "CLKOUT5_DUTY_CYCLE", "CLKOUT6_DUTY_CYCLE" }) {
if (!cell.second->params.count(ctx->id(i)))
instPtr->setConfig(i, "", "0.5");
}
if (!cell.second->params.count(ctx->id("REF_JITTER2")))
instPtr->setConfig("REF_JITTER2", "", "0.01");
if (!cell.second->params.count(ctx->id("SS_MOD_PERIOD")))
instPtr->setConfig("SS_MOD_PERIOD", "", "10000");
} else if (cell.second->type == id_PS7) {
} else
log_error("Unsupported cell type '%s'.\n", cell.second->type.c_str(ctx));
}