diff --git a/himbaechel/uarch/ng-ultra/bitstream.cc b/himbaechel/uarch/ng-ultra/bitstream.cc
index c4a812eb..82bab6d8 100644
--- a/himbaechel/uarch/ng-ultra/bitstream.cc
+++ b/himbaechel/uarch/ng-ultra/bitstream.cc
@@ -103,7 +103,8 @@ struct BitstreamJsonBackend
 
     void add_net(std::set<std::string> &nets, std::string src_tile, std::string src_name, std::string dst_tile, std::string dst_name, IdString src_type, IdString dst_type)
     {
-        if (src_type.in(ctx->id("CROSSBAR_INPUT_WIRE"), ctx->id("LUT_PERMUTATION_WIRE"), ctx->id("MUX_WIRE"), ctx->id("INTERCONNECT_INPUT"))) return;
+        if (src_type.in(ctx->id("LUT_PERMUTATION_WIRE"), ctx->id("MUX_WIRE"), ctx->id("INTERCONNECT_INPUT"))) return;
+        if (boost::starts_with(src_type.c_str(ctx),"CROSSBAR_") && boost::ends_with(src_type.c_str(ctx),"INPUT_WIRE")) return;
         if (dst_type == ctx->id("MUX_WIRE"))
             dst_name = dst_name.substr(0, dst_name.rfind('.'));
         src_name = update_name(src_tile, src_name);
diff --git a/himbaechel/uarch/ng-ultra/gen/arch_gen.py b/himbaechel/uarch/ng-ultra/gen/arch_gen.py
index 3096fa72..70c53207 100644
--- a/himbaechel/uarch/ng-ultra/gen/arch_gen.py
+++ b/himbaechel/uarch/ng-ultra/gen/arch_gen.py
@@ -412,7 +412,7 @@ def create_tile_types(ch: Chip, bels, bel_pins, crossbars, interconnects, muxes,
                 outputs = list()
                 for index in bel_pins[xb].keys():
                     pin = bel_pins[xb][index]
-                    tt.create_wire(name=f"{name}."+pin["name"], type="CROSSBAR_INPUT_WIRE" if pin["direction"] == "Input" else "CROSSBAR_OUTPUT_WIRE")
+                    tt.create_wire(name=f"{name}."+pin["name"], type="CROSSBAR_"+xb+"_INPUT_WIRE" if pin["direction"] == "Input" else "CROSSBAR_"+xb+"_OUTPUT_WIRE")
                 for index in bel_pins[xb].keys():
                     pin = bel_pins[xb][index]
                     if pin["direction"] == "Input":