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ice40: Fail early on SB_PLL40_*_PAD cells

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This commit is contained in:
Sergiusz Bazanski 2018-07-23 16:58:11 +01:00
parent 2b1f7875bb
commit db31c0625b
2 changed files with 14 additions and 0 deletions
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7
ice40/cells.h
View File

@ -78,6 +78,13 @@ inline bool is_sb_pll40(const BaseCtx *ctx, const CellInfo *cell)
cell->type == ctx->id("SB_PLL40_2F_CORE");
}
inline bool is_sb_pll40_pad(const BaseCtx *ctx, const CellInfo *cell)
{
return cell->type == ctx->id("SB_PLL40_PAD") || cell->type == ctx->id("SB_PLL40_2_PAD") ||
cell->type == ctx->id("SB_PLL40_2F_PAD");
}
uint8_t sb_pll40_type(const BaseCtx *ctx, const CellInfo *cell);
// Convert a SB_LUT primitive to (part of) an ICESTORM_LC, swapping ports

7
ice40/pack.cc
View File

@ -595,6 +595,13 @@ static void pack_special(Context *ctx)
std::unique_ptr<CellInfo> packed =
create_ice_cell(ctx, ctx->id("ICESTORM_PLL"), ci->name.str(ctx) + "_PLL");
packed_cells.insert(ci->name);
if (is_sb_pll40_pad(ctx, ci)) {
// TODO(q3k): Implement these after checking their behaviour on
// a board with exposed 'clock pads'.
log_error("SB_PLL40_*_PAD cells are not supported yet.\n");
}
for (auto attr : ci->attrs)
packed->attrs[attr.first] = attr.second;
for (auto param : ci->params)