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interchange: Implement getWireType

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Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2021-04-30 11:07:31 +01:00
parent ecf24201ec
commit dcb09ec8de
3 changed files with 21 additions and 2 deletions
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2
3rdparty/fpga-interchange-schema vendored

@ -1 +1 @@
Subproject commit 5208d794d318e9151b93120d7e5ba75d8aef45e7
Subproject commit b3ab09776c8dc31a71ca2c7fbcb4575219232d16

2
common/arch_pybindings_shared.h
View File

@ -67,6 +67,8 @@ fn_wrapper_1a<Context, decltype(&Context::getWireBelPins), &Context::getWireBelP
fn_wrapper_1a<Context, decltype(&Context::getWireChecksum), &Context::getWireChecksum, pass_through<uint32_t>,
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireChecksum");
fn_wrapper_1a<Context, decltype(&Context::getWireType), &Context::getWireType, conv_to_str<IdString>,
conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireType");
fn_wrapper_3a_v<Context, decltype(&Context::bindWire), &Context::bindWire, conv_from_str<WireId>,
addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindWire");
fn_wrapper_1a_v<Context, decltype(&Context::unbindWire), &Context::unbindWire, conv_from_str<WireId>>::def_wrap(

19
fpga_interchange/arch.cc
View File

@ -461,7 +461,24 @@ WireId Arch::getWireByName(IdStringList name) const
return ret;
}
IdString Arch::getWireType(WireId wire) const { return id(""); }
IdString Arch::getWireType(WireId wire) const
{
int tile = wire.tile, index = wire.index;
if (tile == -1) {
// Nodal wire
const TileWireRefPOD &wr = chip_info->nodes[wire.index].tile_wires[0];
tile = wr.tile;
index = wr.index;
}
auto &w2t = chip_info->tiles[tile].tile_wire_to_type;
if (index >= w2t.ssize())
return IdString();
int wire_type = w2t[index];
if (wire_type == -1)
return IdString();
return IdString(chip_info->wire_types[wire_type].name);
}
std::vector<std::pair<IdString, std::string>> Arch::getWireAttrs(WireId wire) const { return {}; }
// -----------------------------------------------------------------------