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Fix IOM case

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This commit is contained in:
Miodrag Milanovic 2024-05-11 10:12:27 +02:00
parent ccda0dc28d
commit de090c7a77
1 changed files with 33 additions and 31 deletions
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64
himbaechel/uarch/ng-ultra/pack.cc
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@ -475,38 +475,40 @@ void NgUltraPacker::pack_iobs(void)
NetInfo *o_net = cell->getPort(id_O); NetInfo *o_net = cell->getPort(id_O);
if (o_net) { if (o_net) {
CellInfo *iod = net_only_drives(ctx, o_net, is_dfr, id_I, true); CellInfo *iod = net_only_drives(ctx, o_net, is_dfr, id_I, true);
bool bfr_mode = false; if (!(o_net->users.entries()==1 && (*o_net->users.begin()).cell->type == id_NX_IOM_U)) {
if (!iod) { bool bfr_mode = false;
if (cell->type==id_IOTP) ddrf_as_bfr++; else dfr_as_bfr++; if (!iod) {
iod = create_cell_ptr((cell->type==id_IOTP) ? id_DDFR : id_DFR, ctx->id(cell->name.str(ctx) + "$iod_id")); if (cell->type==id_IOTP) ddrf_as_bfr++; else dfr_as_bfr++;
NetInfo *new_in = ctx->createNet(ctx->id(iod->name.str(ctx) + "$I")); iod = create_cell_ptr((cell->type==id_IOTP) ? id_DDFR : id_DFR, ctx->id(cell->name.str(ctx) + "$iod_id"));
iod->setParam(ctx->id("iobname"),str_or_default(cell->params, ctx->id("iobname"), "")); NetInfo *new_in = ctx->createNet(ctx->id(iod->name.str(ctx) + "$I"));
iod->setParam(ctx->id("type"), Property("BFR")); iod->setParam(ctx->id("iobname"),str_or_default(cell->params, ctx->id("iobname"), ""));
cell->disconnectPort(id_O); iod->setParam(ctx->id("type"), Property("BFR"));
iod->connectPort(id_O, o_net); cell->disconnectPort(id_O);
iod->setParam(ctx->id("mode"), Property(2, 2)); iod->connectPort(id_O, o_net);
iod->setParam(ctx->id("data_inv"), Property(0, 1)); iod->setParam(ctx->id("mode"), Property(2, 2));
iod->connectPort(id_I, new_in); iod->setParam(ctx->id("data_inv"), Property(0, 1));
cell->connectPort(id_O,new_in); iod->connectPort(id_I, new_in);
bfr_mode = true; cell->connectPort(id_O,new_in);
} else log_error("TODO handle DFR"); bfr_mode = true;
Loc cd_loc = cell->getLocation(); } else log_error("TODO handle DFR");
cd_loc.z += 1; Loc cd_loc = cell->getLocation();
BelId bel = ctx->getBelByLocation(cd_loc); cd_loc.z += 1;
ctx->bindBel(bel, iod, PlaceStrength::STRENGTH_LOCKED); BelId bel = ctx->getBelByLocation(cd_loc);
ctx->bindBel(bel, iod, PlaceStrength::STRENGTH_LOCKED);
// Depending of DDFR mode we must use one of dedicated routes (ITCs) // Depending of DDFR mode we must use one of dedicated routes (ITCs)
if (iod->type==id_DDFR) { if (iod->type==id_DDFR) {
WireId dwire = ctx->getBelPinWire(bel, id_O); WireId dwire = ctx->getBelPinWire(bel, id_O);
for (PipId pip : ctx->getPipsDownhill(dwire)) { for (PipId pip : ctx->getPipsDownhill(dwire)) {
const auto &pip_data = chip_pip_info(ctx->chip_info, pip); const auto &pip_data = chip_pip_info(ctx->chip_info, pip);
const auto &extra_data = *reinterpret_cast<const NGUltraPipExtraDataPOD *>(pip_data.extra_data.get()); const auto &extra_data = *reinterpret_cast<const NGUltraPipExtraDataPOD *>(pip_data.extra_data.get());
if (!extra_data.name) continue; if (!extra_data.name) continue;
if (extra_data.type != PipExtra::PIP_EXTRA_MUX) continue; if (extra_data.type != PipExtra::PIP_EXTRA_MUX) continue;
if (bfr_mode && extra_data.input == 2) { if (bfr_mode && extra_data.input == 2) {
uarch->blocked_pips.emplace(pip); uarch->blocked_pips.emplace(pip);
} else if (!bfr_mode && extra_data.input == 1) { } else if (!bfr_mode && extra_data.input == 1) {
uarch->blocked_pips.emplace(pip); uarch->blocked_pips.emplace(pip);
}
} }
} }
} }