diff --git a/ecp5/arch.cc b/ecp5/arch.cc
index d0dc63f0..47546ccc 100644
--- a/ecp5/arch.cc
+++ b/ecp5/arch.cc
@@ -92,16 +92,16 @@ static const ChipInfoPOD *get_chip_info(const RelPtr<ChipInfoPOD> *ptr) { return
 void load_chipdb();
 #endif
 
-#define LFE5U_25F_ONLY
+#define LFE5U_45F_ONLY
 
 Arch::Arch(ArchArgs args) : args(args)
 {
 #if defined(_MSC_VER)
     load_chipdb();
 #endif
-#ifdef LFE5U_25F_ONLY
-    if (args.type == ArchArgs::LFE5U_25F) {
-        chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_25k));
+#ifdef LFE5U_45F_ONLY
+    if (args.type == ArchArgs::LFE5U_45F) {
+        chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_45k));
     } else {
         log_error("Unsupported ECP5 chip type.\n");
     }
diff --git a/ecp5/family.cmake b/ecp5/family.cmake
index 190a3345..f58cdbb2 100644
--- a/ecp5/family.cmake
+++ b/ecp5/family.cmake
@@ -1,5 +1,5 @@
 
-set(devices 25k)
+set(devices 45k)
 
 set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/trellis_import.py)
 
diff --git a/ecp5/main.cc b/ecp5/main.cc
index 6456a11e..ae229d51 100644
--- a/ecp5/main.cc
+++ b/ecp5/main.cc
@@ -108,7 +108,7 @@ int main(int argc, char *argv[])
         Trellis::load_database(TRELLIS_ROOT "/database");
 
         ArchArgs args;
-        args.type = ArchArgs::LFE5U_25F;
+        args.type = ArchArgs::LFE5U_45F;
         args.package = "CABGA381";
         args.speed = 6;
         Context ctx(args);
@@ -149,7 +149,7 @@ int main(int argc, char *argv[])
                 log_error("Routing design failed.\n");
 
             // TEST BEGIN
-            Trellis::Chip c("LFE5U-25F");
+            Trellis::Chip c("LFE5U-45F");
             for (auto pip : ctx.getPips()) {
                 if (!ctx.checkPipAvail(pip)) {
                     auto tile = c.get_tile_by_position_and_type(pip.location.y, pip.location.x, ctx.getPipTiletype(pip));