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Rearrange bool algebra

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This commit is contained in:
Ross Schlaikjer 2020-04-07 14:31:17 -04:00
parent 3257bdc8a1
commit e46b990251
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GPG Key ID: 3C4CAA5FEDEF28DA
1 changed files with 2 additions and 2 deletions
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4
ecp5/pack.cc
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@ -3007,10 +3007,10 @@ void Arch::assignArchInfo()
// Output register mode (REGMODE_{A,B}). Valid options are 'NOREG' and 'OUTREG'.
std::string regmode_a = str_or_default(ci->params, id("REGMODE_A"), "NOREG");
if (!(regmode_a == "NOREG" || regmode_a == "OUTREG"))
if (regmode_a != "NOREG" && regmode_a != "OUTREG")
NPNR_ASSERT_FALSE_STR("bad DP16KD REGMODE_A configuration '" + regmode_a + "'");
std::string regmode_b = str_or_default(ci->params, id("REGMODE_B"), "NOREG");
if (!(regmode_b == "NOREG" || regmode_b == "OUTREG"))
if (regmode_b != "NOREG" && regmode_b != "OUTREG")
NPNR_ASSERT_FALSE_STR("bad DP16KD REGMODE_B configuration '" + regmode_b + "'");
ci->ramInfo.is_output_a_registered = regmode_a == "OUTREG";
ci->ramInfo.is_output_b_registered = regmode_b == "OUTREG";