Fix small isses and code formatting
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
This commit is contained in:
Maciej Dudek
parent
439ae9609b
commit
ea489f6d93
@ -735,7 +735,7 @@ class SAPlacer
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#endif
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for (auto cell_pair : moved_cells) {
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CellInfo *cell = ctx->cells.at(cell_pair.first).get();
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if (cell->bel != BelId()){
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if (cell->bel != BelId()) {
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#if CHAIN_DEBUG
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log_info("%d unbind %s\n", __LINE__, ctx->nameOfBel(cell->bel));
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#endif
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@ -899,10 +899,10 @@ struct Arch : ArchAPI<ArchRanges>
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ArcBounds getClusterBounds(ClusterId cluster) const override;
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Loc getClusterOffset(const CellInfo *cell) const override;
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bool isClusterStrict(const CellInfo *cell) const override;
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bool normal_cluster_placement(const Context *, const Cluster &, const ClusterPOD &,CellInfo*,
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BelId, std::vector<std::pair<CellInfo *, BelId>> &) const;
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bool macro_cluster_placement(const Context *, const Cluster &, const ClusterPOD &,CellInfo*,
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BelId, std::vector<std::pair<CellInfo *, BelId>> &) const;
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bool normal_cluster_placement(const Context *, const Cluster &, const ClusterPOD &, CellInfo *, BelId,
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std::vector<std::pair<CellInfo *, BelId>> &) const;
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bool macro_cluster_placement(const Context *, const Cluster &, const ClusterPOD &, CellInfo *, BelId,
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std::vector<std::pair<CellInfo *, BelId>> &) const;
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bool getClusterPlacement(ClusterId cluster, BelId root_bel,
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std::vector<std::pair<CellInfo *, BelId>> &placement) const override;
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@ -189,9 +189,9 @@ CellInfo *Arch::getClusterRootCell(ClusterId cluster) const
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return clusters.at(cluster).root;
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}
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bool Arch::normal_cluster_placement(
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const Context *ctx, const Cluster &packed_cluster, const ClusterPOD &cluster_data,
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CellInfo *root_cell, BelId root_bel, std::vector<std::pair<CellInfo *, BelId>> &placement) const
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bool Arch::normal_cluster_placement(const Context *ctx, const Cluster &packed_cluster, const ClusterPOD &cluster_data,
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CellInfo *root_cell, BelId root_bel,
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std::vector<std::pair<CellInfo *, BelId>> &placement) const
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{
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BelId next_bel;
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@ -278,34 +278,33 @@ bool Arch::normal_cluster_placement(
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static dict<int32_t, dict<IdString, BelId>> tileAndBelNameToBelIdCache;
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BelId check_and_return(int32_t tile, IdString name){
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if(tileAndBelNameToBelIdCache.count(tile)
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&& tileAndBelNameToBelIdCache[tile].count(name))
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BelId check_and_return(int32_t tile, IdString name)
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{
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if (tileAndBelNameToBelIdCache.count(tile) && tileAndBelNameToBelIdCache[tile].count(name))
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return tileAndBelNameToBelIdCache[tile][name];
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else
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return BelId();
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}
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void add_to_cache(int32_t tile, IdString name, BelId t){
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tileAndBelNameToBelIdCache[tile][name] = t;
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}
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void add_to_cache(int32_t tile, IdString name, BelId t) { tileAndBelNameToBelIdCache[tile][name] = t; }
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bool find_site_idx(const Context *ctx, const ClusterPOD &cluster, BelId root_bel, uint32_t &idx){
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bool find_site_idx(const Context *ctx, const ClusterPOD &cluster, BelId root_bel, uint32_t &idx)
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{
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bool found = false;
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const auto &site_inst = ctx->get_site_inst(root_bel);
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IdString site_type(site_inst.site_type);
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if (ctx->debug){
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if (ctx->debug) {
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log_info("%s\n", ctx->get_site_name(root_bel));
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log_info("Root_bel site_type: %s\n", site_type.c_str(ctx));
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log_info("Allowed site_types:\n");
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}
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for(const auto &site : cluster.physical_placements){
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for (const auto &site : cluster.physical_placements) {
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IdString name(site.site_type);
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if(ctx->debug)
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if (ctx->debug)
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log_info("\t%s\n", name.c_str(ctx));
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if (name == site_type){
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if (name == site_type) {
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found = true;
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break;
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}
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@ -314,22 +313,23 @@ bool find_site_idx(const Context *ctx, const ClusterPOD &cluster, BelId root_bel
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return found;
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}
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bool find_placement_idx(const Context *ctx, const ClusterPOD &cluster,
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BelId root_bel, uint32_t idx, uint32_t &placement_idx){
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bool find_placement_idx(const Context *ctx, const ClusterPOD &cluster, BelId root_bel, uint32_t idx,
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uint32_t &placement_idx)
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{
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bool found = false;
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const auto &bel_data = bel_info(ctx->chip_info, root_bel);
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IdString root_bel_name(bel_data.name);
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if(ctx->debug){
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if (ctx->debug) {
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log_info("Root_bel name: %s\n", root_bel_name.c_str(ctx));
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log_info("Allowed root_bels:\n");
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}
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for(const auto &place : cluster.physical_placements[idx].places){
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for (const auto bel : place.bels){
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for (const auto &place : cluster.physical_placements[idx].places) {
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for (const auto bel : place.bels) {
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IdString name(bel);
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if(ctx->debug)
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log_info("\t%s\n",name.c_str(ctx));
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if (ctx->debug)
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log_info("\t%s\n", name.c_str(ctx));
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if(name == root_bel_name){
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if (name == root_bel_name) {
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found = true;
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break;
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}
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@ -341,26 +341,27 @@ bool find_placement_idx(const Context *ctx, const ClusterPOD &cluster,
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return found;
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}
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dict<uint32_t, BelId> idx_bel_mapping(const Context *ctx, BelId root_bel,
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const ClusterPOD &cluster, uint32_t idx, uint32_t placement_idx){
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dict<uint32_t, BelId> idx_bel_mapping(const Context *ctx, BelId root_bel, const ClusterPOD &cluster, uint32_t idx,
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uint32_t placement_idx)
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{
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dict<uint32_t, BelId> idx_bel_map;
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auto root_bel_full_name = ctx->getBelName(root_bel);
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uint32_t t_idx = 0;
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if(ctx->debug)
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if (ctx->debug)
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log_info("Used bels:\n");
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for(const auto &bel : cluster.physical_placements[idx].places[placement_idx].bels){
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for (const auto &bel : cluster.physical_placements[idx].places[placement_idx].bels) {
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IdString s_bel(bel);
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BelId t = check_and_return(root_bel.tile, s_bel);
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IdStringList cpy(root_bel_full_name.size());
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if (t == BelId()){
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for(uint32_t j = 0; j < root_bel_full_name.size(); j++)
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if (t == BelId()) {
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for (uint32_t j = 0; j < root_bel_full_name.size(); j++)
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cpy.ids[j] = root_bel_full_name[j];
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cpy.ids[1] = s_bel;
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cpy.ids[root_bel_full_name.size() - 1] = s_bel;
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t = ctx->getBelByName(cpy);
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add_to_cache(root_bel.tile, s_bel, t);
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}
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if(ctx->debug){
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for(uint32_t j = 0; j < root_bel_full_name.size(); j++)
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if (ctx->debug) {
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for (uint32_t j = 0; j < root_bel_full_name.size(); j++)
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cpy.ids[j] = root_bel_full_name[j];
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cpy.ids[1] = s_bel;
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for (auto str : cpy)
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@ -372,14 +373,14 @@ dict<uint32_t, BelId> idx_bel_mapping(const Context *ctx, BelId root_bel,
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return idx_bel_map;
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}
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bool Arch::macro_cluster_placement(
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const Context *ctx, const Cluster &packed_cluster, const ClusterPOD &cluster_data,
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CellInfo *root_cell, BelId root_bel, std::vector<std::pair<CellInfo *, BelId>> &placement) const
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bool Arch::macro_cluster_placement(const Context *ctx, const Cluster &packed_cluster, const ClusterPOD &cluster_data,
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CellInfo *root_cell, BelId root_bel,
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std::vector<std::pair<CellInfo *, BelId>> &placement) const
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{
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// Check root_bel site_type
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const auto &cluster = cluster_info(chip_info, packed_cluster.index);
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uint32_t idx = 0;
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if(!find_site_idx(ctx, cluster, root_bel, idx))
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if (!find_site_idx(ctx, cluster, root_bel, idx))
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return false;
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// Check if root_bel name
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@ -390,7 +391,7 @@ bool Arch::macro_cluster_placement(
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// Map cells to bels
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dict<uint32_t, BelId> idx_bel_map = idx_bel_mapping(ctx, root_bel, cluster, idx, placement_idx);
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for(auto idx_bel : idx_bel_map){
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for (auto idx_bel : idx_bel_map) {
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placement.emplace_back(packed_cluster.cluster_nodes[idx_bel.first], idx_bel.second);
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}
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@ -409,11 +410,9 @@ bool Arch::getClusterPlacement(ClusterId cluster, BelId root_bel,
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if (!ctx->isValidBelForCellType(root_cell->type, root_bel))
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return false;
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if (!cluster_data.from_macro)
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return normal_cluster_placement(ctx, packed_cluster, cluster_data, root_cell,
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root_bel, placement);
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else{
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bool temp = macro_cluster_placement(ctx, packed_cluster, cluster_data, root_cell,
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root_bel, placement);
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return normal_cluster_placement(ctx, packed_cluster, cluster_data, root_cell, root_bel, placement);
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else {
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bool temp = macro_cluster_placement(ctx, packed_cluster, cluster_data, root_cell, root_bel, placement);
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return temp;
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}
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}
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@ -506,34 +505,39 @@ static bool check_cluster_cells_compatibility(CellInfo *old_cell, CellInfo *new_
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return true;
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}
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bool reduce(uint32_t x, uint32_t y, const ClusterPOD *cluster, dict<uint32_t, pool<CellInfo *, hash_ptr_ops>> &domain, Context *ctx){
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bool reduce(uint32_t x, uint32_t y, const ClusterPOD *cluster, dict<uint32_t, pool<CellInfo *, hash_ptr_ops>> &domain,
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Context *ctx)
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{
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// Reduce X domain by removing values, which don't satisfy binary constraint with values from Y domain.
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bool change = false;
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std::vector<CellInfo *> remove_cell;
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uint32_t counter = 0;
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for (const auto &connection : cluster->connection_graph[x].connections){
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if(connection.target_idx == y)
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for (const auto &connection : cluster->connection_graph[x].connections) {
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if (connection.target_idx == y)
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break;
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counter ++;
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counter++;
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}
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for (const auto &x_cell : domain[x]){
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for (const auto &x_cell : domain[x]) {
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bool found = false;
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for (const auto &y_cell : domain[y]){
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for (const auto &y_cell : domain[y]) {
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found = true;
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for (const auto edge : cluster->connection_graph[x].connections[counter].edges){
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if (!x_cell->ports.count(IdString(edge.cell_pin)) || !y_cell->ports.count(IdString(edge.other_cell_pin))){
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for (const auto edge : cluster->connection_graph[x].connections[counter].edges) {
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if (!x_cell->ports.count(IdString(edge.cell_pin)) ||
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!y_cell->ports.count(IdString(edge.other_cell_pin))) {
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found = false;
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break;
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}
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const auto x_net = x_cell->ports[IdString(edge.cell_pin)].net;
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const auto y_net = y_cell->ports[IdString(edge.other_cell_pin)].net;
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if (x_net != y_net){
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if (x_net != y_net) {
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found = false;
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break;
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}
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bool x_driver = x_net->driver.cell == x_cell;
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bool y_driver = y_net->driver.cell == y_cell;
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if ((edge.dir != 0 || !y_driver) && (edge.dir != 1 || !x_driver) && (edge.dir != 2 || y_driver || x_driver)){
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if ((edge.dir != 0 || !y_driver) && (edge.dir != 1 || !x_driver) &&
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(edge.dir != 2 || y_driver || x_driver)) {
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found = false;
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break;
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}
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@ -545,7 +549,7 @@ bool reduce(uint32_t x, uint32_t y, const ClusterPOD *cluster, dict<uint32_t, po
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remove_cell.push_back(x_cell);
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}
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for (const auto &cell : remove_cell){
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for (const auto &cell : remove_cell) {
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domain[x].erase(cell);
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change = true;
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}
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@ -553,16 +557,17 @@ bool reduce(uint32_t x, uint32_t y, const ClusterPOD *cluster, dict<uint32_t, po
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return change;
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}
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void binary_constraint_check(const ClusterPOD *cluster,
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std::queue<std::pair<uint32_t, uint32_t>> &workqueue,
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dict<uint32_t, pool<CellInfo *, hash_ptr_ops>> &idx_to_cells, Context *ctx){
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while (!workqueue.empty()){
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void binary_constraint_check(const ClusterPOD *cluster, std::queue<std::pair<uint32_t, uint32_t>> &workqueue,
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dict<uint32_t, pool<CellInfo *, hash_ptr_ops>> &idx_to_cells, Context *ctx)
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{
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while (!workqueue.empty()) {
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std::pair<uint32_t, uint32_t> arc = workqueue.front();
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workqueue.pop();
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uint32_t x,y;
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x = arc.first; y = arc.second;
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if (reduce(x, y, cluster, idx_to_cells, ctx)){
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for (const auto &node : cluster->connection_graph){
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uint32_t x, y;
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x = arc.first;
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y = arc.second;
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if (reduce(x, y, cluster, idx_to_cells, ctx)) {
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for (const auto &node : cluster->connection_graph) {
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if (node.idx != arc.first)
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for (const auto &connection : node.connections)
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if (connection.target_idx == arc.first)
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@ -572,34 +577,35 @@ void binary_constraint_check(const ClusterPOD *cluster,
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}
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}
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bool back_solver(const ClusterPOD *cluster,
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dict<uint32_t, pool<CellInfo *, hash_ptr_ops>> &idx_to_cells, Context *ctx){
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bool back_solver(const ClusterPOD *cluster, dict<uint32_t, pool<CellInfo *, hash_ptr_ops>> &idx_to_cells, Context *ctx)
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{
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dict<CellInfo *, pool<uint32_t>, hash_ptr_ops> possible_idx;
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for (const auto &arc : idx_to_cells)
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for (const auto &cell : arc.second)
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possible_idx[cell].insert(arc.first);
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std::queue<uint32_t> prep;
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for (const auto &arc : idx_to_cells){
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for (const auto &arc : idx_to_cells) {
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if (arc.second.size() == 0)
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return false;
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if (arc.second.size()>1){
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for (const auto &cell : arc.second){
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if (arc.second.size() > 1) {
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for (const auto &cell : arc.second) {
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auto copy_idx_to_cells(idx_to_cells);
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copy_idx_to_cells[arc.first].clear();
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for (uint32_t idx : possible_idx[cell]){
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for (uint32_t idx : possible_idx[cell]) {
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copy_idx_to_cells[idx].erase(cell);
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prep.push(idx);
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}
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copy_idx_to_cells[arc.first].insert(cell);
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std::queue<std::pair<uint32_t, uint32_t>> workqueue;
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while(!prep.empty()){
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uint32_t idx = prep.front(); prep.pop();
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while (!prep.empty()) {
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uint32_t idx = prep.front();
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prep.pop();
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for (const auto &connection : cluster->connection_graph[idx].connections)
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if (arc.first != connection.target_idx)
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workqueue.push(std::pair<uint32_t, uint32_t>(arc.first, connection.target_idx));
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}
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binary_constraint_check(cluster, workqueue, copy_idx_to_cells, ctx);
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if (back_solver(cluster, copy_idx_to_cells, ctx)){
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if (back_solver(cluster, copy_idx_to_cells, ctx)) {
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idx_to_cells = std::move(copy_idx_to_cells);
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return true;
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}
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@ -609,7 +615,7 @@ bool back_solver(const ClusterPOD *cluster,
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return true;
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}
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void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
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void Arch::prepare_macro_cluster(const ClusterPOD *cluster, uint32_t index)
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{
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Context *ctx = getCtx();
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IdString cluster_name(cluster->name);
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@ -620,45 +626,48 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
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// Find cluster roots for each macro only ones
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dict<IdString, CellInfo *> roots;
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for (auto &cell : cells){
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for (auto &cell : cells) {
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CellInfo *ci = cell.second.get();
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if(ci->macro_parent == IdString())
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if (ci->macro_parent == IdString())
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continue;
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if(ci->cluster != ClusterId())
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if (ci->cluster != ClusterId())
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continue;
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if (!cluster_cell_types.count(ci->type))
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continue;
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if(roots.count(ci->macro_parent))
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if (roots.count(ci->macro_parent))
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continue;
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// Simple check based on cell type counting
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dict<IdString, uint32_t> cells_in_macro, counter;
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// cells_in_macro stores cell_types used in tested cluster and
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// cell_types that are in macro_to_cells[ci->macro_parent]
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pool<IdString> cell_types;
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for (auto &cell_type : cluster->required_cells){
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for (auto &cell_type : cluster->required_cells) {
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cells_in_macro[IdString(cell_type.name)] = cell_type.count;
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cell_types.insert(IdString(cell_type.name));
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}
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for (auto &node_cell : macro_to_cells[ci->macro_parent]){
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for (auto &node_cell : macro_to_cells[ci->macro_parent]) {
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auto cell_type = node_cell->type;
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if(!counter.count(cell_type))
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counter[cell_type] = 0;
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counter[cell_type]++;
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cell_types.insert(cell_type);
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}
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bool failed = false;
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for(auto cell_type : cell_types){
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if(ctx->verbose && cells_in_macro.count(cell_type))
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for (auto cell_type : cell_types) {
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if (ctx->verbose && cells_in_macro.count(cell_type))
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log_info("Required: %s %d\n", cell_type.c_str(ctx), cells_in_macro[cell_type]);
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if(ctx->verbose && cells_in_macro.count(cell_type))
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if (ctx->verbose && cells_in_macro.count(cell_type))
|
||||
log_info("Have: %s %d\n", cell_type.c_str(ctx), counter[cell_type]);
|
||||
if(!cells_in_macro.count(cell_type) || !counter.count(cell_type) || cells_in_macro[cell_type] != counter[cell_type])
|
||||
if (!cells_in_macro.count(cell_type) || !counter.count(cell_type) ||
|
||||
cells_in_macro[cell_type] != counter[cell_type])
|
||||
failed = true;
|
||||
if(failed && ctx->verbose)
|
||||
if (failed && ctx->verbose)
|
||||
log_info("Cell count stage failed, for sure not this cluster\n");
|
||||
if(failed)
|
||||
if (failed)
|
||||
break;
|
||||
}
|
||||
if(failed){
|
||||
if (failed) {
|
||||
roots[ci->macro_parent] = nullptr;
|
||||
continue;
|
||||
}
|
||||
@ -669,42 +678,41 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
|
||||
for (auto &cell : macro_to_cells[ci->macro_parent])
|
||||
for (auto &node : cluster->connection_graph)
|
||||
if (IdString(node.cell_type) == cell->type)
|
||||
if (node.idx != 0 && cell->name != ci->name ||
|
||||
node.idx == 0 && cell->name == ci->name ){
|
||||
if (node.idx != 0 && cell->name != ci->name || node.idx == 0 && cell->name == ci->name) {
|
||||
idx_to_cells[node.idx].insert(cell);
|
||||
}
|
||||
|
||||
for (auto &arc : idx_to_cells){
|
||||
for (auto &arc : idx_to_cells) {
|
||||
std::vector<CellInfo *> remove_cell;
|
||||
pool<IdString> used_ports;
|
||||
for (const auto &port : cluster->connection_graph[arc.first].used_ports)
|
||||
used_ports.insert(IdString(port.name));
|
||||
for (const auto &cell : arc.second){
|
||||
for (const auto &cell : arc.second) {
|
||||
uint32_t count = 0;
|
||||
for (const auto &port : cell->ports){
|
||||
if (!used_ports.count(port.first)){
|
||||
for (const auto &port : cell->ports) {
|
||||
if (!used_ports.count(port.first)) {
|
||||
remove_cell.push_back(cell);
|
||||
break;
|
||||
}
|
||||
count++;
|
||||
}
|
||||
if (count != used_ports.size()){
|
||||
if (count != used_ports.size()) {
|
||||
remove_cell.push_back(cell);
|
||||
break;
|
||||
}
|
||||
}
|
||||
for (const auto &cell : remove_cell){
|
||||
for (const auto &cell : remove_cell) {
|
||||
arc.second.erase(cell);
|
||||
}
|
||||
}
|
||||
if (ctx->debug){
|
||||
if (ctx->debug) {
|
||||
log_info("After mono constraints are applied\n");
|
||||
dict<CellInfo *, pool<uint32_t>, hash_ptr_ops> possible_idx;
|
||||
for (const auto &arc : idx_to_cells)
|
||||
for (const auto &cell : arc.second)
|
||||
possible_idx[cell].insert(arc.first);
|
||||
|
||||
for (const auto arc : possible_idx){
|
||||
for (const auto arc : possible_idx) {
|
||||
log_info("Possible idx %s:\n", arc.first->name.c_str(ctx));
|
||||
for (const auto idx : arc.second)
|
||||
log_info(" - %d\n", idx);
|
||||
@ -714,11 +722,11 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
|
||||
std::queue<std::pair<uint32_t, uint32_t>> workqueue;
|
||||
for (const auto &arc : idx_to_cells)
|
||||
for (const auto &connection : cluster->connection_graph[arc.first].connections)
|
||||
workqueue.push(std::pair<uint32_t, uint32_t>(arc.first, connection.target_idx));
|
||||
workqueue.emplace(arc.first, connection.target_idx);
|
||||
|
||||
binary_constraint_check(cluster, workqueue, idx_to_cells, ctx);
|
||||
for (const auto &arc : idx_to_cells){
|
||||
if (arc.second.size() == 0){
|
||||
for (const auto &arc : idx_to_cells) {
|
||||
if (arc.second.size() == 0) {
|
||||
if (ctx->debug)
|
||||
log_info("AC-3 failed\n");
|
||||
failed = true;
|
||||
@ -728,14 +736,14 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
|
||||
if (failed)
|
||||
continue;
|
||||
|
||||
if (ctx->debug){
|
||||
if (ctx->debug) {
|
||||
log_info("After AC-3\n");
|
||||
dict<CellInfo *, pool<uint32_t>, hash_ptr_ops> possible_idx;
|
||||
for (const auto &arc : idx_to_cells)
|
||||
for (const auto &cell : arc.second)
|
||||
possible_idx[cell].insert(arc.first);
|
||||
|
||||
for (const auto arc : possible_idx){
|
||||
for (const auto arc : possible_idx) {
|
||||
log_info("Possible idx %s:\n", arc.first->name.c_str(ctx));
|
||||
for (const auto idx : arc.second)
|
||||
log_info(" - %d\n", idx);
|
||||
@ -747,35 +755,36 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
|
||||
// Keep assigning cells to indices that only map to single cell
|
||||
// Remove this cell from other mappings and recheck binary constraints
|
||||
// Fail if there is no cell for idx or cell has no idx assign
|
||||
do{
|
||||
do {
|
||||
change = false;
|
||||
dict<CellInfo *, pool<uint32_t>, hash_ptr_ops> possible_idx;
|
||||
pool<uint32_t> changed_idxs;
|
||||
for (const auto &arc : idx_to_cells){
|
||||
if (arc.second.size() == 0){
|
||||
for (const auto &arc : idx_to_cells) {
|
||||
if (arc.second.size() == 0) {
|
||||
failed = true;
|
||||
break;
|
||||
}
|
||||
for (const auto &cell : arc.second)
|
||||
possible_idx[cell].insert(arc.first);
|
||||
}
|
||||
if(failed)
|
||||
if (failed)
|
||||
break;
|
||||
for (auto &cell : macro_to_cells[ci->macro_parent])
|
||||
if (possible_idx[cell].size() == 0){
|
||||
if (possible_idx[cell].size() == 0) {
|
||||
failed = true;
|
||||
break;
|
||||
}
|
||||
if(failed)
|
||||
if (failed)
|
||||
break;
|
||||
for (const auto &arc : idx_to_cells){
|
||||
for (const auto &arc : idx_to_cells) {
|
||||
if (arc.second.size() == 1)
|
||||
for (const auto &idx : possible_idx[*arc.second.begin()])
|
||||
if (idx != arc.first)
|
||||
removequeue.push(std::pair<uint32_t, CellInfo*>(idx, *arc.second.begin()));
|
||||
removequeue.push(std::pair<uint32_t, CellInfo *>(idx, *arc.second.begin()));
|
||||
}
|
||||
while(!removequeue.empty()){
|
||||
auto t = removequeue.front(); removequeue.pop();
|
||||
while (!removequeue.empty()) {
|
||||
auto t = removequeue.front();
|
||||
removequeue.pop();
|
||||
uint32_t idx = t.first;
|
||||
CellInfo *cell = t.second;
|
||||
idx_to_cells[idx].erase(cell);
|
||||
@ -787,20 +796,20 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
|
||||
workqueue.push(std::pair<uint32_t, uint32_t>(idx, connection.target_idx));
|
||||
|
||||
binary_constraint_check(cluster, workqueue, idx_to_cells, ctx);
|
||||
}while(change);
|
||||
if(failed){
|
||||
if(ctx->debug)
|
||||
} while (change);
|
||||
if (failed) {
|
||||
if (ctx->debug)
|
||||
log_info("Single cell mapping failed\n");
|
||||
continue;
|
||||
}
|
||||
if (ctx->debug){
|
||||
if (ctx->debug) {
|
||||
log_info("After mapping indices with single cell\n");
|
||||
dict<CellInfo *, pool<uint32_t>, hash_ptr_ops> possible_idx;
|
||||
for (const auto &arc : idx_to_cells)
|
||||
for (const auto &cell : arc.second)
|
||||
possible_idx[cell].insert(arc.first);
|
||||
|
||||
for (const auto arc : possible_idx){
|
||||
for (const auto arc : possible_idx) {
|
||||
log_info("Possible idx %s:\n", arc.first->name.c_str(ctx));
|
||||
for (const auto idx : arc.second)
|
||||
log_info(" - %d\n", idx);
|
||||
@ -810,19 +819,19 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
|
||||
// Next step is to run solver with backtracing to solve for other idx<->cell mappings
|
||||
if (ctx->debug)
|
||||
log_info("Back solver\n");
|
||||
if(!back_solver(cluster, idx_to_cells, ctx)){
|
||||
if(ctx->debug)
|
||||
if (!back_solver(cluster, idx_to_cells, ctx)) {
|
||||
if (ctx->debug)
|
||||
log_info("Back solver failed\n");
|
||||
continue;
|
||||
}
|
||||
if (ctx->debug){
|
||||
if (ctx->debug) {
|
||||
log_info("Final mapping after back solver\n");
|
||||
dict<CellInfo *, pool<uint32_t>, hash_ptr_ops> possible_idx;
|
||||
for (const auto &arc : idx_to_cells)
|
||||
for (const auto &cell : arc.second)
|
||||
possible_idx[cell].insert(arc.first);
|
||||
|
||||
for (const auto arc : possible_idx){
|
||||
for (const auto arc : possible_idx) {
|
||||
log_info("Possible idx %s:\n", arc.first->name.c_str(ctx));
|
||||
for (const auto idx : arc.second)
|
||||
log_info(" - %d\n", idx);
|
||||
@ -832,9 +841,9 @@ void Arch::prepare_macro_cluster( const ClusterPOD *cluster, uint32_t index)
|
||||
cluster_info.root = ci;
|
||||
cluster_info.index = index;
|
||||
cluster_info.cluster_nodes.resize(idx_to_cells.size());
|
||||
ci->cluster.set(ctx, ci->name.str(ctx));
|
||||
for (auto &arc : idx_to_cells){
|
||||
CellInfo * sub_cell = arc.second.pop();
|
||||
ci->cluster = ci->name;
|
||||
for (auto &arc : idx_to_cells) {
|
||||
CellInfo *sub_cell = arc.second.pop();
|
||||
if (ctx->verbose)
|
||||
log_info("%d %s - %s\n", arc.first, sub_cell->name.c_str(ctx), sub_cell->type.c_str(ctx));
|
||||
sub_cell->cluster = ci->cluster;
|
||||
@ -1040,24 +1049,23 @@ void Arch::pack_cluster()
|
||||
dump_clusters(chip_info, ctx);
|
||||
|
||||
for (uint32_t i = 0; i < chip_info->clusters.size(); ++i) {
|
||||
if (!chip_info->clusters[i].from_macro){
|
||||
if (!chip_info->clusters[i].from_macro) {
|
||||
const auto &cluster = chip_info->clusters[i];
|
||||
|
||||
prepare_cluster(&cluster, i);
|
||||
} else if(chip_info->clusters[i].physical_placements.size() > 0) {
|
||||
} else if (chip_info->clusters[i].physical_placements.size() > 0) {
|
||||
const auto &cluster = chip_info->clusters[i];
|
||||
if(ctx->verbose){
|
||||
log_info("%s\n", IdString(cluster.name).c_str(ctx));\
|
||||
if (ctx->verbose) {
|
||||
log_info("%s\n", IdString(cluster.name).c_str(ctx));
|
||||
}
|
||||
|
||||
prepare_macro_cluster(&cluster, i);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
// No physical placement definitions found for given macro.
|
||||
// Use default place and route algorithm as routes connectiong
|
||||
// cells will use global routing
|
||||
const auto &cluster = chip_info->clusters[i];
|
||||
if(ctx->verbose)
|
||||
if (ctx->verbose)
|
||||
log_info("Out of site cluster from macro: %s\n", IdString(cluster.name).c_str(ctx));
|
||||
}
|
||||
}
|
||||
|
||||
@ -423,39 +423,35 @@ NPNR_PACKED_STRUCT(struct ChainablePortPOD {
|
||||
int16_t avg_y_offset;
|
||||
});
|
||||
|
||||
NPNR_PACKED_STRUCT(struct ClusterRequiredCellPOD{
|
||||
NPNR_PACKED_STRUCT(struct ClusterRequiredCellPOD {
|
||||
uint32_t name;
|
||||
uint32_t count;
|
||||
});
|
||||
|
||||
NPNR_PACKED_STRUCT(struct ClusterUsedPortPOD{
|
||||
uint32_t name;
|
||||
});
|
||||
NPNR_PACKED_STRUCT(struct ClusterUsedPortPOD { uint32_t name; });
|
||||
|
||||
NPNR_PACKED_STRUCT(struct ClusterEdgePOD{
|
||||
NPNR_PACKED_STRUCT(struct ClusterEdgePOD {
|
||||
uint32_t dir;
|
||||
uint32_t cell_pin;
|
||||
uint32_t other_cell_pin;
|
||||
uint32_t other_cell_type;
|
||||
});
|
||||
|
||||
NPNR_PACKED_STRUCT(struct ClusterConnectionsPOD{
|
||||
NPNR_PACKED_STRUCT(struct ClusterConnectionsPOD {
|
||||
uint32_t target_idx;
|
||||
RelSlice<ClusterEdgePOD> edges;
|
||||
});
|
||||
|
||||
NPNR_PACKED_STRUCT(struct ClusterConnectionGraphPOD{
|
||||
NPNR_PACKED_STRUCT(struct ClusterConnectionGraphPOD {
|
||||
uint32_t idx;
|
||||
uint32_t cell_type;
|
||||
RelSlice<ClusterConnectionsPOD> connections;
|
||||
RelSlice<ClusterUsedPortPOD> used_ports;
|
||||
});
|
||||
|
||||
NPNR_PACKED_STRUCT(struct ClusterPhysicalPlacementEntryPOD{
|
||||
RelSlice<uint32_t> bels;
|
||||
});
|
||||
NPNR_PACKED_STRUCT(struct ClusterPhysicalPlacementEntryPOD { RelSlice<uint32_t> bels; });
|
||||
|
||||
NPNR_PACKED_STRUCT(struct ClusterPhysicalPlacementsPOD{
|
||||
NPNR_PACKED_STRUCT(struct ClusterPhysicalPlacementsPOD {
|
||||
uint32_t site_type;
|
||||
RelSlice<ClusterPhysicalPlacementEntryPOD> places;
|
||||
});
|
||||
|
||||
@ -79,7 +79,6 @@ void Arch::expand_macros()
|
||||
|
||||
// Get the ultimate root of this macro expansion
|
||||
IdString parent = (cell->macro_parent == IdString()) ? cell->name : cell->macro_parent;
|
||||
log_info("%s %s\n", cell->name.c_str(ctx), parent.c_str(ctx));
|
||||
// Create child instances
|
||||
for (const auto &inst : macro->cell_insts) {
|
||||
CellInfo *inst_cell =
|
||||
@ -88,7 +87,6 @@ void Arch::expand_macros()
|
||||
inst_cell->params[IdString(param.key)] = IdString(param.value).str(ctx);
|
||||
}
|
||||
inst_cell->macro_parent = parent;
|
||||
log_info(" %s %s\n", inst_cell->name.c_str(ctx), inst_cell->type.c_str(ctx));
|
||||
next_cells.push_back(inst_cell);
|
||||
}
|
||||
// Create and connect nets
|
||||
|
||||
Loading…
Reference in New Issue
Block a user