frontend: Fix template compile issues
Signed-off-by: David Shah <dave@ds0.me>
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a26b1a276d
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@ -37,66 +37,66 @@
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*
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* Functions:
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*
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* void foreach_module(Func);
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* void foreach_module(Func) const;
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* calls Func(const std::string &name, const ModuleDataType &mod);
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* for each module in the netlist
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*
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* void foreach_port(const ModuleDataType &mod, Func);
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* void foreach_port(const ModuleDataType &mod, Func) const;
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* calls Func(const std::string &name, const ModulePortDataType &port);
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* for each port of mod
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*
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* void foreach_cell(const ModuleDataType &mod, Func);
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* calls Func(const std::string &name, const CellDataType &cell);
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* void foreach_cell(const ModuleDataType &mod, Func) const;
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* calls Func(const std::string &name, const CellDataType &cell)
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* for each cell of mod
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*
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* void foreach_netname(const ModuleDataType &mod, Func);
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* void foreach_netname(const ModuleDataType &mod, Func) const;
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* calls Func(const std::string &name, const NetnameDataType &cell);
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* for each netname entry of mod
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*
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* PortType get_port_dir(const ModulePortDataType &port);
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* PortType get_port_dir(const ModulePortDataType &port) const;
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* gets the PortType direction of a module port
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*
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* int get_array_offset(const ModulePortDataType &port);
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* int get_array_offset(const ModulePortDataType &port) const;
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* gets the start bit number of a port or netname entry
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*
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* bool is_array_upto(const ModulePortDataType &port);
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* bool is_array_upto(const ModulePortDataType &port) const;
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* returns true if a port/net is an "upto" type port or netname entry
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*
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* const BitVectorDataType &get_port_bits(const ModulePortDataType &port);
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* const BitVectorDataType &get_port_bits(const ModulePortDataType &port) const;
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* gets the bit vector of a module port
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*
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* const std::string& get_cell_type(const CellDataType &cell);
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* const std::string& get_cell_type(const CellDataType &cell) const;
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* gets the type of a cell
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*
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* void foreach_attr(const {ModuleDataType|CellDataType|ModulePortDataType|NetnameDataType} &obj, Func);
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* void foreach_attr(const {ModuleDataType|CellDataType|ModulePortDataType|NetnameDataType} &obj, Func) const;
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* calls Func(const std::string &name, const Property &value);
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* for each attribute on a module, cell, module port or net
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*
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* void foreach_param(const CellDataType &obj, Func);
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* void foreach_param(const CellDataType &obj, Func) const;
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* calls Func(const std::string &name, const Property &value);
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* for each parameter of a cell
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*
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* void foreach_port_dir(const CellDataType &cell, Func);
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* void foreach_port_dir(const CellDataType &cell, Func) const;
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* calls Func(const std::string &name, PortType dir);
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* for each port direction of a cell
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*
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* void foreach_port_conn(const CellDataType &cell, Func);
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* void foreach_port_conn(const CellDataType &cell, Func) const;
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* calls Func(const std::string &name, const BitVectorDataType &conn);
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* for each port connection of a cell
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*
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* const BitVectorDataType &get_net_bits(const NetnameDataType &net);
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* const BitVectorDataType &get_net_bits(const NetnameDataType &net) const;
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* gets the BitVector corresponding to the bits entry of a netname field
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*
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* int get_vector_length(const BitVectorDataType &bits);
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* int get_vector_length(const BitVectorDataType &bits) const;
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* gets the length of a BitVector
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*
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* bool is_vector_bit_constant(const BitVectorDataType &bits, int i);
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* bool is_vector_bit_constant(const BitVectorDataType &bits, int i) const;
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* returns true if bit <i> of bits is constant
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*
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* char get_vector_bit_constval(const BitVectorDataType &bits, int i);
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* char get_vector_bit_constval(const BitVectorDataType &bits, int i) const;
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* returns a char [01xz] corresponding to the constant value of bit <i>
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*
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* int get_vector_bit_signal(const BitVectorDataType &bits, int i);
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* int get_vector_bit_signal(const BitVectorDataType &bits, int i) const;
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* returns the signal number of vector bit <i>
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*
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*/
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@ -121,12 +121,15 @@ template <typename FrontendType> struct GenericFrontend
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GenericFrontend(Context *ctx, const FrontendType &impl) : ctx(ctx), impl(impl) {}
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void operator()()
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{
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// Find which module is top
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find_top_module();
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HierModuleState m;
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m.is_toplevel = true;
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m.prefix = "";
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// Do the actual import, starting from the top level module
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import_module(m, mod_refs.at(top));
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}
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Context *ctx;
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const FrontendType &impl;
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using mod_dat_t = typename FrontendType::ModuleDataType;
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@ -146,7 +149,7 @@ template <typename FrontendType> struct GenericFrontend
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impl.foreach_module([&](const std::string &name, const mod_dat_t &mod) {
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IdString mod_id = ctx->id(name);
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auto &mi = mods[mod_id];
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mod_refs[mod_id] = mod;
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mod_refs.emplace(mod_id, mod);
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impl.foreach_attr(mod, [&](const std::string &name, const Property &value) {
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if (name == "top")
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mi.is_top = (value.intval != 0);
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@ -249,7 +252,7 @@ template <typename FrontendType> struct GenericFrontend
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import_port_connections(m, data);
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} else {
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// Just create a list of ports for netname resolution
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impl.foreach_port(m,
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impl.foreach_port(data,
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[&](const std::string &name, const mod_port_dat_t &) { m.port_to_bus[ctx->id(name)]; });
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}
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import_module_netnames(m, data);
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@ -293,7 +296,7 @@ template <typename FrontendType> struct GenericFrontend
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// Use the rule above to find the preferred name for a net
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name = m.net_names.at(idx).at(0);
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for (size_t j = 1; j < m.net_names.at(idx).size(); j++)
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if (prefer_netlabel(m.net_names.at(idx).at(j), name))
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if (prefer_netlabel(m, m.net_names.at(idx).at(j), name))
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name = m.net_names.at(idx).at(j);
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} else {
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name = "$frontend$" + std::to_string(idx);
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@ -318,6 +321,7 @@ template <typename FrontendType> struct GenericFrontend
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net->aliases.push_back(net->name);
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ctx->net_aliases[net->name] = net->name;
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}
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return net;
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}
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// Get the name of a vector bit given basename; settings and index
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@ -351,7 +355,7 @@ template <typename FrontendType> struct GenericFrontend
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std::string bit_name = get_bit_name(basename, i, width, offset, upto);
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int net_bit = impl.get_vecotr_bit_signal(bits, i);
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int net_bit = impl.get_vector_bit_signal(bits, i);
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int mapped_bit = m.net_by_idx(net_bit);
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if (mapped_bit == -1) {
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// Net doesn't exist yet. Add the name here to the list of candidate names so we have that for when
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@ -372,18 +376,20 @@ template <typename FrontendType> struct GenericFrontend
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});
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}
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void create_constant_net(HierModuleState &m, const std::string name_hint, char constval)
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// Create a new constant net; given a hint for what the name should be and its value
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NetInfo *create_constant_net(HierModuleState &m, const std::string &name_hint, char constval)
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{
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IdString name = unique_name(m.base, name_hint);
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IdString name = unique_name(m.prefix, name_hint, true);
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NetInfo *ni = ctx->createNet(name);
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add_constant_driver(m, ni, constval);
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return ni;
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}
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// Import a leaf cell - (white|black)box
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void import_leaf_cell(HierModuleState &m, const std::string &name, const cell_dat_t &cd)
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{
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IdString inst_name = unique_name(m.base, name, false);
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CellInfo *ci = ctx->createCell(inst_name, ctx->id(get_cell_type(cd)));
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IdString inst_name = unique_name(m.prefix, name, false);
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CellInfo *ci = ctx->createCell(inst_name, ctx->id(impl.get_cell_type(cd)));
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// Import port directions
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std::unordered_map<IdString, PortType> port_dirs;
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impl.foreach_port_dir(cd, [&](const std::string &port, PortType dir) { port_dirs[ctx->id(port)] = dir; });
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@ -464,8 +470,8 @@ template <typename FrontendType> struct GenericFrontend
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// Import the cells section of a module
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void import_module_cells(HierModuleState &m, const mod_dat_t &data)
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{
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m.foreach_cell(data, [&](const std::string &cellname, const cell_dat_t &cd) {
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IdString type = ctx->id(get_cell_type(cd));
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impl.foreach_cell(data, [&](const std::string &cellname, const cell_dat_t &cd) {
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IdString type = ctx->id(impl.get_cell_type(cd));
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if (mods.count(type) && !mods.at(type).is_box()) {
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// Module type is known; and not boxed. Import as a submodule by flattening hierarchy
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import_submodule_cell(m, cellname, cd);
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@ -542,7 +548,7 @@ template <typename FrontendType> struct GenericFrontend
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// Import ports of the top level module
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void import_toplevel_ports(HierModuleState &m, const mod_dat_t &data)
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{
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m.foreach_port(data, [&](const std::string &portname, const mod_port_dat_t &pd) {
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impl.foreach_port(data, [&](const std::string &portname, const mod_port_dat_t &pd) {
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const auto &port_bv = impl.get_port_bits(pd);
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int offset = impl.get_array_offset(pd);
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bool is_upto = impl.is_array_upto(pd);
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@ -650,7 +656,7 @@ template <typename FrontendType> struct GenericFrontend
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// Inputs cannot be driving a constant back to the parent
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if (dir == PORT_IN)
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log_error("Input port %s%s[%d] cannot be driving a constant '%c'.\n", m.prefix.c_str(),
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port.c_str(), i, constval);
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name.c_str(), i, constval);
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// Insert the constant driver
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add_constant_driver(m, conn_ni, constval);
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} else {
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@ -673,9 +679,4 @@ template <typename FrontendType> struct GenericFrontend
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};
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} // namespace
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template <typename FrontendType> void run_frontend(Context *ctx, const FrontendType &impl)
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{
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GenericFrontend<FrontendType>(ctx, impl)();
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}
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NEXTPNR_NAMESPACE_END
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@ -40,13 +40,13 @@ struct JsonFrontendImpl
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typedef const Json &NetnameDataType;
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typedef const Json::array &BitVectorDataType;
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template <typename TFunc> void foreach_module(TFunc Func)
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template <typename TFunc> void foreach_module(TFunc Func) const
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{
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for (const auto &mod : root.object_items())
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Func(mod.first, mod.second);
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}
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template <typename TFunc> void foreach_port(const ModuleDataType &mod, TFunc Func)
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template <typename TFunc> void foreach_port(const ModuleDataType &mod, TFunc Func) const
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{
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const auto &ports = mod["ports"];
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if (ports.is_null())
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@ -55,7 +55,7 @@ struct JsonFrontendImpl
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Func(port.first, port.second);
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}
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template <typename TFunc> void foreach_cell(const ModuleDataType &mod, TFunc Func)
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template <typename TFunc> void foreach_cell(const ModuleDataType &mod, TFunc Func) const
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{
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const auto &cells = mod["cells"];
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if (cells.is_null())
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@ -64,7 +64,7 @@ struct JsonFrontendImpl
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Func(cell.first, cell.second);
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}
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template <typename TFunc> void foreach_netname(const ModuleDataType &mod, TFunc Func)
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template <typename TFunc> void foreach_netname(const ModuleDataType &mod, TFunc Func) const
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{
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const auto &netnames = mod["netnames"];
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if (netnames.is_null())
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@ -73,7 +73,7 @@ struct JsonFrontendImpl
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Func(netname.first, netname.second);
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}
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PortType lookup_portdir(const std::string &dir)
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PortType lookup_portdir(const std::string &dir) const
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{
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if (dir == "input")
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return PORT_IN;
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@ -85,25 +85,28 @@ struct JsonFrontendImpl
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NPNR_ASSERT_FALSE("invalid json port direction");
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}
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PortType get_port_dir(const ModulePortDataType &port) { return lookup_portdir(port["direction"].string_value()); }
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PortType get_port_dir(const ModulePortDataType &port) const
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{
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return lookup_portdir(port["direction"].string_value());
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}
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int get_array_offset(const Json &obj)
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int get_array_offset(const Json &obj) const
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{
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auto offset = obj["offset"];
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return offset.is_null() ? 0 : offset.int_value();
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}
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bool is_array_upto(const Json &obj)
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bool is_array_upto(const Json &obj) const
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{
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auto upto = obj["upto"];
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return upto.is_null() ? false : bool(upto.int_value());
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}
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const BitVectorDataType &get_port_bits(const ModulePortDataType &port) { return port["bits"].array_items(); }
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const BitVectorDataType &get_port_bits(const ModulePortDataType &port) const { return port["bits"].array_items(); }
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const std::string &get_cell_type(const CellDataType &cell) { return cell["type"].string_value(); }
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const std::string &get_cell_type(const CellDataType &cell) const { return cell["type"].string_value(); }
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Property parse_property(const Json &val)
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Property parse_property(const Json &val) const
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{
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if (val.is_number())
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return Property(val.int_value(), 32);
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@ -111,7 +114,7 @@ struct JsonFrontendImpl
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return Property::from_string(val.string_value());
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}
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template <typename TFunc> void foreach_attr(const Json &obj, TFunc Func)
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template <typename TFunc> void foreach_attr(const Json &obj, TFunc Func) const
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{
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const auto &attrs = obj["attributes"];
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if (attrs.is_null())
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@ -121,7 +124,7 @@ struct JsonFrontendImpl
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}
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}
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template <typename TFunc> void foreach_param(const Json &obj, TFunc Func)
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template <typename TFunc> void foreach_param(const Json &obj, TFunc Func) const
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{
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const auto ¶ms = obj["parameters"];
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if (params.is_null())
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@ -131,39 +134,36 @@ struct JsonFrontendImpl
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}
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}
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template <typename TFunc> void foreach_port_dir(const CellDataType &cell, TFunc Func)
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template <typename TFunc> void foreach_port_dir(const CellDataType &cell, TFunc Func) const
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{
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for (const auto &pdir : cell["port_directions"].object_items())
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Func(pdir.first, lookup_portdir(pdir.second.string_value()));
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}
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template <typename TFunc> void foreach_port_conn(const CellDataType &cell, TFunc Func)
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template <typename TFunc> void foreach_port_conn(const CellDataType &cell, TFunc Func) const
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{
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for (const auto &pconn : cell["connections"].object_items())
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Func(pconn.first, pconn.second);
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Func(pconn.first, pconn.second.array_items());
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}
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template <typename TFunc> const BitVectorDataType &get_net_bits(const NetnameDataType &net)
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{
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return net["bits"].array_items();
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}
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const BitVectorDataType &get_net_bits(const NetnameDataType &net) const { return net["bits"].array_items(); }
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int get_vector_length(const BitVectorDataType &bits) { return int(bits.size()); }
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int get_vector_length(const BitVectorDataType &bits) const { return int(bits.size()); }
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bool is_vector_bit_constant(const BitVectorDataType &bits, int i)
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bool is_vector_bit_constant(const BitVectorDataType &bits, int i) const
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{
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NPNR_ASSERT(i < int(bits.size()));
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return bits[i].is_string();
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}
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char get_vector_bit_constval(const BitVectorDataType &bits, int i)
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char get_vector_bit_constval(const BitVectorDataType &bits, int i) const
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{
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auto s = bits.at(i).string_value();
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NPNR_ASSERT(s.size() == 1);
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return s.at(0);
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}
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int get_vector_bit_signal(const BitVectorDataType &bits, int i)
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int get_vector_bit_signal(const BitVectorDataType &bits, int i) const
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{
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NPNR_ASSERT(bits.at(i).is_number());
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return bits.at(i).int_value();
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@ -182,7 +182,7 @@ bool parse_json(std::istream &in, const std::string &filename, Context *ctx)
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if (root.is_null())
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log_error("Failed to parse JSON file '%s': %s.\n", filename.c_str(), error.c_str());
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}
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run_frontend(ctx, JsonFrontendImpl(root));
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GenericFrontend<JsonFrontendImpl>(ctx, JsonFrontendImpl(root))();
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return true;
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}
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