ice40: Removing deprecated API in cells.cc
Signed-off-by: David Shah <davey1576@gmail.com>
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79d1075345
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@ -24,10 +24,11 @@
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NEXTPNR_NAMESPACE_BEGIN
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static void add_port(const Context *ctx, CellInfo *cell, IdString name,
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void add_port(const Context *ctx, CellInfo *cell, std::string name,
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PortType dir)
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{
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cell->ports[name] = PortInfo{name, nullptr, dir};
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IdString id = ctx->id(name);
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cell->ports[id] = PortInfo{id, nullptr, dir};
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}
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CellInfo *create_ice_cell(Context *ctx, IdString type, IdString name)
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@ -41,13 +42,13 @@ CellInfo *create_ice_cell(Context *ctx, IdString type, IdString name)
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new_cell->name = name;
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}
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new_cell->type = type;
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if (type == "ICESTORM_LC") {
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new_cell->params["LUT_INIT"] = "0";
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new_cell->params["NEG_CLK"] = "0";
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new_cell->params["CARRY_ENABLE"] = "0";
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new_cell->params["DFF_ENABLE"] = "0";
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new_cell->params["SET_NORESET"] = "0";
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new_cell->params["ASYNC_SR"] = "0";
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if (type == ctx->id("ICESTORM_LC")) {
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new_cell->params[ctx->id("LUT_INIT")] = "0";
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new_cell->params[ctx->id("NEG_CLK")] = "0";
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new_cell->params[ctx->id("CARRY_ENABLE")] = "0";
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new_cell->params[ctx->id("DFF_ENABLE")] = "0";
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new_cell->params[ctx->id("SET_NORESET")] = "0";
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new_cell->params[ctx->id("ASYNC_SR")] = "0";
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add_port(ctx, new_cell, "I0", PORT_IN);
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add_port(ctx, new_cell, "I1", PORT_IN);
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@ -62,11 +63,11 @@ CellInfo *create_ice_cell(Context *ctx, IdString type, IdString name)
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add_port(ctx, new_cell, "LO", PORT_OUT);
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add_port(ctx, new_cell, "O", PORT_OUT);
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add_port(ctx, new_cell, "OUT", PORT_OUT);
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} else if (type == "SB_IO") {
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new_cell->params["PIN_TYPE"] = "0";
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new_cell->params["PULLUP"] = "0";
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new_cell->params["NEG_TRIGGER"] = "0";
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new_cell->params["IOSTANDARD"] = "SB_LVCMOS";
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} else if (type == ctx->id("SB_IO")) {
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new_cell->params[ctx->id("PIN_TYPE")] = "0";
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new_cell->params[ctx->id("PULLUP")] = "0";
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new_cell->params[ctx->id("NEG_TRIGGER")] = "0";
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new_cell->params[ctx->id("IOSTANDARD")] = "SB_LVCMOS";
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add_port(ctx, new_cell, "PACKAGE_PIN", PORT_INOUT);
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@ -81,11 +82,11 @@ CellInfo *create_ice_cell(Context *ctx, IdString type, IdString name)
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add_port(ctx, new_cell, "D_IN_0", PORT_OUT);
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add_port(ctx, new_cell, "D_IN_1", PORT_OUT);
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} else if (type == "ICESTORM_RAM") {
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new_cell->params["NEG_CLK_W"] = "0";
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new_cell->params["NEG_CLK_R"] = "0";
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new_cell->params["WRITE_MODE"] = "0";
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new_cell->params["READ_MODE"] = "0";
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} else if (type == ctx->id("ICESTORM_RAM")) {
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new_cell->params[ctx->id("NEG_CLK_W")] = "0";
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new_cell->params[ctx->id("NEG_CLK_R")] = "0";
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new_cell->params[ctx->id("WRITE_MODE")] = "0";
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new_cell->params[ctx->id("READ_MODE")] = "0";
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add_port(ctx, new_cell, "RCLK", PORT_IN);
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add_port(ctx, new_cell, "RCLKE", PORT_IN);
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@ -105,7 +106,7 @@ CellInfo *create_ice_cell(Context *ctx, IdString type, IdString name)
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add_port(ctx, new_cell, "RADDR_" + std::to_string(i), PORT_IN);
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add_port(ctx, new_cell, "WADDR_" + std::to_string(i), PORT_IN);
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}
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} else if (type == "SB_GB") {
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} else if (type == ctx->id("SB_GB")) {
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add_port(ctx, new_cell, "USER_SIGNAL_TO_GLOBAL_BUFFER", PORT_IN);
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add_port(ctx, new_cell, "GLOBAL_BUFFER_OUTPUT", PORT_OUT);
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} else {
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@ -130,16 +131,16 @@ void lut_to_lc(const Context *ctx, CellInfo *lut, CellInfo *lc, bool no_dff)
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void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc,
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bool pass_thru_lut)
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{
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lc->params["DFF_ENABLE"] = "1";
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std::string config = dff->type.str().substr(6);
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lc->params[ctx->id("DFF_ENABLE")] = "1";
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std::string config = dff->type.str(ctx).substr(6);
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auto citer = config.begin();
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replace_port(dff, "C", lc, "CLK");
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if (citer != config.end() && *citer == 'N') {
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lc->params["NEG_CLK"] = "1";
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lc->params[ctx->id("NEG_CLK")] = "1";
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++citer;
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} else {
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lc->params["NEG_CLK"] = "0";
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lc->params[ctx->id("NEG_CLK")] = "0";
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}
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if (citer != config.end() && *citer == 'E') {
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@ -151,27 +152,27 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc,
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if ((config.end() - citer) >= 2) {
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char c = *(citer++);
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assert(c == 'S');
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lc->params["ASYNC_SR"] = "0";
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lc->params[ctx->id("ASYNC_SR")] = "0";
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} else {
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lc->params["ASYNC_SR"] = "1";
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lc->params[ctx->id("ASYNC_SR")] = "1";
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}
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if (*citer == 'S') {
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citer++;
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replace_port(dff, "S", lc, "SR");
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lc->params["SET_NORESET"] = "1";
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lc->params[ctx->id("SET_NORESET")] = "1";
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} else {
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assert(*citer == 'R');
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citer++;
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replace_port(dff, "R", lc, "SR");
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lc->params["SET_NORESET"] = "0";
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lc->params[ctx->id("SET_NORESET")] = "0";
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}
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}
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assert(citer == config.end());
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if (pass_thru_lut) {
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lc->params["LUT_INIT"] = "2";
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lc->params[ctx->id("LUT_INIT")] = "2";
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replace_port(dff, "D", lc, "I0");
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}
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@ -180,14 +181,14 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc,
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void nxio_to_sb(const Context *ctx, CellInfo *nxio, CellInfo *sbio)
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{
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if (nxio->type == "$nextpnr_ibuf") {
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sbio->params["PIN_TYPE"] = "1";
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if (nxio->type == ctx->id("$nextpnr_ibuf")) {
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sbio->params[ctx->id("PIN_TYPE")] = "1";
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auto pu_attr = nxio->attrs.find("PULLUP");
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if (pu_attr != nxio->attrs.end())
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sbio->params["PULLUP"] = pu_attr->second;
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sbio->params[ctx->id("PULLUP")] = pu_attr->second;
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replace_port(nxio, "O", sbio, "D_IN_0");
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} else if (nxio->type == "$nextpnr_obuf") {
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sbio->params["PIN_TYPE"] = "25";
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} else if (nxio->type == ctx->id("$nextpnr_obuf")) {
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sbio->params[ctx->id("PIN_TYPE")] = "25";
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replace_port(nxio, "I", sbio, "D_OUT_0");
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} else {
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assert(false);
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@ -199,11 +200,11 @@ bool is_clock_port(const Context *ctx, const PortRef &port)
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if (port.cell == nullptr)
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return false;
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if (is_ff(ctx, port.cell))
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return port.port == "C";
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if (port.cell->type == "ICESTORM_LC")
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return port.port == "CLK";
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if (is_ram(ctx, port.cell) || port.cell->type == "ICESTORM_RAM")
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return port.port == "RCLK" || port.port == "WCLK";
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return port.port == ctx->id("C");
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if (port.cell->type == ctx->id("ICESTORM_LC"))
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return port.port == ctx->id("CLK");
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if (is_ram(ctx, port.cell) || port.cell->type == ctx->id("ICESTORM_RAM"))
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return port.port == ctx->id("RCLK") || port.port == ctx->id("WCLK");
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return false;
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}
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@ -212,9 +213,9 @@ bool is_reset_port(const Context *ctx, const PortRef &port)
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if (port.cell == nullptr)
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return false;
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if (is_ff(ctx, port.cell))
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return port.port == "R" || port.port == "S";
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if (port.cell->type == "ICESTORM_LC")
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return port.port == "SR";
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return port.port == ctx->id("R") || port.port == ctx->id("S");
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if (port.cell->type == ctx->id("ICESTORM_LC"))
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return port.port == ctx->id("SR");
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return false;
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}
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@ -223,9 +224,9 @@ bool is_enable_port(const Context *ctx, const PortRef &port)
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if (port.cell == nullptr)
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return false;
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if (is_ff(ctx, port.cell))
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return port.port == "E";
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if (port.cell->type == "ICESTORM_LC")
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return port.port == "CEN";
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return port.port == ctx->id("E");
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if (port.cell->type == ctx->id("ICESTORM_LC"))
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return port.port == ctx->id("CEN");
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return false;
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}
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