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Progress with chipdb refactoring

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Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2018-06-16 18:42:29 +02:00
parent f0edb625e3
commit ee06db3293
3 changed files with 37 additions and 42 deletions
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4
ice40/chip.cc
View File

@ -264,7 +264,7 @@ IdString Chip::getPipName(PipId pip) const
BelId Chip::getPackagePinBel(const std::string &pin) const BelId Chip::getPackagePinBel(const std::string &pin) const
{ {
for (int i = 0; i < package_info->num_pins; i++) { for (int i = 0; i < package_info->num_pins; i++) {
if (package_info->pins[i].name == pin) { if (package_info->pins[i].name.ptr() == pin) {
BelId id; BelId id;
id.index = package_info->pins[i].bel_index; id.index = package_info->pins[i].bel_index;
return id; return id;
@ -277,7 +277,7 @@ std::string Chip::getBelPackagePin(BelId bel) const
{ {
for (int i = 0; i < package_info->num_pins; i++) { for (int i = 0; i < package_info->num_pins; i++) {
if (package_info->pins[i].bel_index == bel.index) { if (package_info->pins[i].bel_index == bel.index) {
return std::string(package_info->pins[i].name); return std::string(package_info->pins[i].name.ptr());
} }
} }
return ""; return "";

2
ice40/chip.h
View File

@ -138,7 +138,7 @@ struct WireInfoPOD
struct PackagePinPOD struct PackagePinPOD
{ {
const char *name; RelPtr<char> name;
int32_t bel_index; int32_t bel_index;
} __attribute__((packed)); } __attribute__((packed));

73
ice40/chipdb.py
View File

@ -394,11 +394,13 @@ class BinaryBlobAssembler:
for i in range(len(v)): for i in range(len(v)):
self.data.append(ord(v[i])) self.data.append(ord(v[i]))
self.data.append(0) self.data.append(0)
self.comments[len(self.data)] = comment if comment is not None:
self.comments[len(self.data)] = comment
def u8(self, v, comment): def u8(self, v, comment):
self.data.append(v) self.data.append(v)
self.comments[len(self.data)] = comment if comment is not None:
self.comments[len(self.data)] = comment
def u16(self, v, comment): def u16(self, v, comment):
if endianness == "le": if endianness == "le":
@ -409,7 +411,8 @@ class BinaryBlobAssembler:
self.data.append(v & 255) self.data.append(v & 255)
else: else:
assert 0 assert 0
self.comments[len(self.data)] = comment if comment is not None:
self.comments[len(self.data)] = comment
def u32(self, v, comment): def u32(self, v, comment):
if endianness == "le": if endianness == "le":
@ -424,7 +427,8 @@ class BinaryBlobAssembler:
self.data.append(v & 255) self.data.append(v & 255)
else: else:
assert 0 assert 0
self.comments[len(self.data)] = comment if comment is not None:
self.comments[len(self.data)] = comment
def write_c(self, f): def write_c(self, f):
cursor = 0 cursor = 0
@ -501,30 +505,23 @@ for bel in range(len(bel_name)):
bba.u8(bel_pos[bel][2], "z") bba.u8(bel_pos[bel][2], "z")
bba.u8(0, "filler") bba.u8(0, "filler")
print("static uint8_t binblob_%s[] = {" % dev_name)
bba.write_c(sys.stdout)
print("};")
wireinfo = list() wireinfo = list()
pipinfo = list() pipinfo = list()
pipcache = dict() pipcache = dict()
uppips_array = list()
downpips_array = list()
downbels_array = list()
for wire in range(num_wires): for wire in range(num_wires):
if wire in wire_uphill: if wire in wire_uphill:
pips = list() pips = list()
for src in wire_uphill[wire]: for src in wire_uphill[wire]:
if (src, wire) not in pipcache: if (src, wire) not in pipcache:
pipcache[(src, wire)] = len(pipinfo) pipcache[(src, wire)] = len(pipinfo)
pipinfo.append(" {%d, %d, 1.0, %d, %d, %d, %d}" % (src, wire, pip_xy[(src, wire)][0], pip_xy[(src, wire)][1], pip_xy[(src, wire)][2], pip_xy[(src, wire)][3])) pipinfo.append(" {%d, %d, 1, %d, %d, %d, %d}" % (src, wire, pip_xy[(src, wire)][0], pip_xy[(src, wire)][1], pip_xy[(src, wire)][2], pip_xy[(src, wire)][3]))
pips.append("%d" % pipcache[(src, wire)]) pips.append(pipcache[(src, wire)])
num_uphill = len(pips) num_uphill = len(pips)
list_uphill = "wire%d_uppips" % wire list_uphill = "wire%d_uppips" % wire
print("#define wire%d_uppips (wire_uppips+%d)" % (wire, len(uppips_array))) bba.l(list_uphill, "int32_t")
uppips_array += pips for p in pips:
bba.u32(p, None)
else: else:
num_uphill = 0 num_uphill = 0
list_uphill = "nullptr" list_uphill = "nullptr"
@ -534,21 +531,23 @@ for wire in range(num_wires):
for dst in wire_downhill[wire]: for dst in wire_downhill[wire]:
if (wire, dst) not in pipcache: if (wire, dst) not in pipcache:
pipcache[(wire, dst)] = len(pipinfo) pipcache[(wire, dst)] = len(pipinfo)
pipinfo.append(" {%d, %d, 1.0, %d, %d, %d, %d}" % (wire, dst, pip_xy[(wire, dst)][0], pip_xy[(wire, dst)][1], pip_xy[(wire, dst)][2], pip_xy[(wire, dst)][3])) pipinfo.append(" {%d, %d, 1, %d, %d, %d, %d}" % (wire, dst, pip_xy[(wire, dst)][0], pip_xy[(wire, dst)][1], pip_xy[(wire, dst)][2], pip_xy[(wire, dst)][3]))
pips.append("%d" % pipcache[(wire, dst)]) pips.append(pipcache[(wire, dst)])
num_downhill = len(pips) num_downhill = len(pips)
list_downhill = "wire%d_downpips" % wire list_downhill = "wire%d_downpips" % wire
print("#define wire%d_downpips (wire_downpips+%d)" % (wire, len(downpips_array))) bba.l(list_downhill, "int32_t")
downpips_array += pips for p in pips:
bba.u32(p, None)
else: else:
num_downhill = 0 num_downhill = 0
list_downhill = "nullptr" list_downhill = "nullptr"
if wire in wire_downhill_belports: if wire in wire_downhill_belports:
num_bels_downhill = len(wire_downhill_belports[wire]) num_bels_downhill = len(wire_downhill_belports[wire])
bba.l("wire%d_downbels" % wire, "BelPortPOD")
print("#define wire%d_downbels (wire_downbels+%d)" % (wire, len(downbels_array))) for belport in wire_downhill_belports[wire]:
downbels_array += ["{%d, PIN_%s}" % it for it in wire_downhill_belports[wire]] bba.u32(belport[0], "bel_index")
bba.u32(portpins[belport[1]], "port")
else: else:
num_bels_downhill = 0 num_bels_downhill = 0
@ -575,18 +574,6 @@ for wire in range(num_wires):
wireinfo.append(info) wireinfo.append(info)
print("static int wire_uppips[] = {")
print(" " + "\n ".join(textwrap.wrap(", ".join(uppips_array))))
print("};");
print("static int wire_downpips[] = {")
print(" " + "\n ".join(textwrap.wrap(", ".join(downpips_array))))
print("};");
print("static BelPortPOD wire_downbels[] = {")
print(" " + "\n ".join(textwrap.wrap(", ".join(downbels_array))))
print("};");
packageinfo = [] packageinfo = []
for package in packages: for package in packages:
@ -597,12 +584,20 @@ for package in packages:
pinname, x, y, z = pin pinname, x, y, z = pin
pin_bel = "X%d/Y%d/io%d" % (x, y, z) pin_bel = "X%d/Y%d/io%d" % (x, y, z)
bel_idx = bel_name.index(pin_bel) bel_idx = bel_name.index(pin_bel)
pins_info.append('{"%s", %d}' % (pinname, bel_idx)) pins_info.append((pinname, bel_idx))
print("static PackagePinPOD package_%s_pins[%d] = {" % (safename, len(pins_info))) for pi in pins_info:
print(" " + ",\n ".join(pins_info)) bba.l("package_%s_pins_%s" % (safename, pi[0]), "char")
print("};") bba.s(pi[0], None)
bba.l("package_%s_pins" % safename, "PackagePinPOD")
for pi in pins_info:
bba.r("package_%s_pins_%s" % (safename, pi[0]), "name")
bba.u32(pi[1], "bel_index")
packageinfo.append('{"%s", %d, package_%s_pins}' % (name, len(pins_info), safename)) packageinfo.append('{"%s", %d, package_%s_pins}' % (name, len(pins_info), safename))
print("static uint8_t binblob_%s[] = {" % dev_name)
bba.write_c(sys.stdout)
print("};")
tilegrid = [] tilegrid = []
for y in range(dev_height): for y in range(dev_height):
for x in range(dev_width): for x in range(dev_width):