Progress with chipdb refactoring
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
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f0edb625e3
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ee06db3293
@ -264,7 +264,7 @@ IdString Chip::getPipName(PipId pip) const
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BelId Chip::getPackagePinBel(const std::string &pin) const
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{
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for (int i = 0; i < package_info->num_pins; i++) {
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if (package_info->pins[i].name == pin) {
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if (package_info->pins[i].name.ptr() == pin) {
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BelId id;
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id.index = package_info->pins[i].bel_index;
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return id;
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@ -277,7 +277,7 @@ std::string Chip::getBelPackagePin(BelId bel) const
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{
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for (int i = 0; i < package_info->num_pins; i++) {
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if (package_info->pins[i].bel_index == bel.index) {
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return std::string(package_info->pins[i].name);
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return std::string(package_info->pins[i].name.ptr());
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}
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}
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return "";
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@ -138,7 +138,7 @@ struct WireInfoPOD
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struct PackagePinPOD
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{
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const char *name;
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RelPtr<char> name;
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int32_t bel_index;
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} __attribute__((packed));
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@ -394,10 +394,12 @@ class BinaryBlobAssembler:
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for i in range(len(v)):
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self.data.append(ord(v[i]))
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self.data.append(0)
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if comment is not None:
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self.comments[len(self.data)] = comment
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def u8(self, v, comment):
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self.data.append(v)
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if comment is not None:
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self.comments[len(self.data)] = comment
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def u16(self, v, comment):
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@ -409,6 +411,7 @@ class BinaryBlobAssembler:
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self.data.append(v & 255)
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else:
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assert 0
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if comment is not None:
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self.comments[len(self.data)] = comment
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def u32(self, v, comment):
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@ -424,6 +427,7 @@ class BinaryBlobAssembler:
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self.data.append(v & 255)
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else:
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assert 0
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if comment is not None:
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self.comments[len(self.data)] = comment
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def write_c(self, f):
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@ -501,30 +505,23 @@ for bel in range(len(bel_name)):
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bba.u8(bel_pos[bel][2], "z")
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bba.u8(0, "filler")
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print("static uint8_t binblob_%s[] = {" % dev_name)
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bba.write_c(sys.stdout)
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print("};")
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wireinfo = list()
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pipinfo = list()
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pipcache = dict()
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uppips_array = list()
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downpips_array = list()
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downbels_array = list()
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for wire in range(num_wires):
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if wire in wire_uphill:
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pips = list()
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for src in wire_uphill[wire]:
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if (src, wire) not in pipcache:
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pipcache[(src, wire)] = len(pipinfo)
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pipinfo.append(" {%d, %d, 1.0, %d, %d, %d, %d}" % (src, wire, pip_xy[(src, wire)][0], pip_xy[(src, wire)][1], pip_xy[(src, wire)][2], pip_xy[(src, wire)][3]))
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pips.append("%d" % pipcache[(src, wire)])
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pipinfo.append(" {%d, %d, 1, %d, %d, %d, %d}" % (src, wire, pip_xy[(src, wire)][0], pip_xy[(src, wire)][1], pip_xy[(src, wire)][2], pip_xy[(src, wire)][3]))
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pips.append(pipcache[(src, wire)])
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num_uphill = len(pips)
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list_uphill = "wire%d_uppips" % wire
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print("#define wire%d_uppips (wire_uppips+%d)" % (wire, len(uppips_array)))
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uppips_array += pips
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bba.l(list_uphill, "int32_t")
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for p in pips:
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bba.u32(p, None)
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else:
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num_uphill = 0
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list_uphill = "nullptr"
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@ -534,21 +531,23 @@ for wire in range(num_wires):
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for dst in wire_downhill[wire]:
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if (wire, dst) not in pipcache:
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pipcache[(wire, dst)] = len(pipinfo)
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pipinfo.append(" {%d, %d, 1.0, %d, %d, %d, %d}" % (wire, dst, pip_xy[(wire, dst)][0], pip_xy[(wire, dst)][1], pip_xy[(wire, dst)][2], pip_xy[(wire, dst)][3]))
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pips.append("%d" % pipcache[(wire, dst)])
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pipinfo.append(" {%d, %d, 1, %d, %d, %d, %d}" % (wire, dst, pip_xy[(wire, dst)][0], pip_xy[(wire, dst)][1], pip_xy[(wire, dst)][2], pip_xy[(wire, dst)][3]))
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pips.append(pipcache[(wire, dst)])
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num_downhill = len(pips)
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list_downhill = "wire%d_downpips" % wire
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print("#define wire%d_downpips (wire_downpips+%d)" % (wire, len(downpips_array)))
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downpips_array += pips
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bba.l(list_downhill, "int32_t")
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for p in pips:
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bba.u32(p, None)
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else:
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num_downhill = 0
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list_downhill = "nullptr"
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if wire in wire_downhill_belports:
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num_bels_downhill = len(wire_downhill_belports[wire])
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print("#define wire%d_downbels (wire_downbels+%d)" % (wire, len(downbels_array)))
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downbels_array += ["{%d, PIN_%s}" % it for it in wire_downhill_belports[wire]]
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bba.l("wire%d_downbels" % wire, "BelPortPOD")
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for belport in wire_downhill_belports[wire]:
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bba.u32(belport[0], "bel_index")
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bba.u32(portpins[belport[1]], "port")
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else:
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num_bels_downhill = 0
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@ -575,18 +574,6 @@ for wire in range(num_wires):
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wireinfo.append(info)
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print("static int wire_uppips[] = {")
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print(" " + "\n ".join(textwrap.wrap(", ".join(uppips_array))))
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print("};");
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print("static int wire_downpips[] = {")
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print(" " + "\n ".join(textwrap.wrap(", ".join(downpips_array))))
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print("};");
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print("static BelPortPOD wire_downbels[] = {")
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print(" " + "\n ".join(textwrap.wrap(", ".join(downbels_array))))
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print("};");
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packageinfo = []
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for package in packages:
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@ -597,12 +584,20 @@ for package in packages:
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pinname, x, y, z = pin
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pin_bel = "X%d/Y%d/io%d" % (x, y, z)
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bel_idx = bel_name.index(pin_bel)
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pins_info.append('{"%s", %d}' % (pinname, bel_idx))
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print("static PackagePinPOD package_%s_pins[%d] = {" % (safename, len(pins_info)))
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print(" " + ",\n ".join(pins_info))
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print("};")
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pins_info.append((pinname, bel_idx))
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for pi in pins_info:
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bba.l("package_%s_pins_%s" % (safename, pi[0]), "char")
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bba.s(pi[0], None)
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bba.l("package_%s_pins" % safename, "PackagePinPOD")
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for pi in pins_info:
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bba.r("package_%s_pins_%s" % (safename, pi[0]), "name")
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bba.u32(pi[1], "bel_index")
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packageinfo.append('{"%s", %d, package_%s_pins}' % (name, len(pins_info), safename))
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print("static uint8_t binblob_%s[] = {" % dev_name)
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bba.write_c(sys.stdout)
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print("};")
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tilegrid = []
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for y in range(dev_height):
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for x in range(dev_width):
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