caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge pull request #1048 from yrabbit/chipdb-cfg

Browse Source 
gowin: add information about pin configurations
This commit is contained in:
myrtle 2022-12-02 09:58:46 +01:00 committed by GitHub
commit f07d9a1835
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 23 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.github/workflows/arch_ci.yml vendored
View File

@ -18,7 +18,7 @@ jobs:
TRELLIS_REVISION: 48486ebd1e03e4ac42c96299e881adf9d43bc241
PRJOXIDE_REVISION: c3fb1526cf4a2165e15b74f4a994d153c7695fe4
MISTRAL_REVISION: ebfc0dd2cc7d6d2159b641a397c88554840e93c9
APYCULA_REVISION: 0.2a4
APYCULA_REVISION: 0.5.1a1
steps:
- uses: actions/checkout@v3
with:

15
gowin/arch.cc
View File

@ -666,6 +666,17 @@ const PairPOD *pairLookup(const PairPOD *list, const size_t len, const int dest)
return nullptr;
}
const PinPOD *pinLookup(const PinPOD *list, const size_t len, const int idx)
{
for (size_t i = 0; i < len; i++) {
const PinPOD *pin = &list[i];
if (pin->index_id == idx) {
return pin;
}
}
return nullptr;
}
bool aliasCompare(GlobalAliasPOD i, GlobalAliasPOD j)
{
return (i.dest_row < j.dest_row) || (i.dest_row == j.dest_row && i.dest_col < j.dest_col) ||
@ -947,9 +958,9 @@ void Arch::read_cst(std::istream &in)
case ioloc: { // IO_LOC name pin
IdString pinname = id(match[2]);
pinline = match[2];
const PairPOD *belname = pairLookup(package->pins.get(), package->num_pins, pinname.index);
const PinPOD *belname = pinLookup(package->pins.get(), package->num_pins, pinname.index);
if (belname != nullptr) {
std::string bel = IdString(belname->src_id).str(this);
std::string bel = IdString(belname->loc_id).str(this);
it->second->setAttr(IdString(ID_BEL), bel);
} else {
if (std::regex_match(pinline, match_pinloc, iobelre)) {

11
gowin/arch.h
View File

@ -140,10 +140,17 @@ NPNR_PACKED_STRUCT(struct PartnumberPOD {
uint32_t speed_id;
});
NPNR_PACKED_STRUCT(struct PinPOD {
uint16_t index_id;
uint16_t loc_id;
uint32_t num_cfgs;
RelPtr<uint32_t> cfgs;
});
NPNR_PACKED_STRUCT(struct PackagePOD {
uint32_t name_id;
uint32_t num_pins;
RelPtr<PairPOD> pins;
RelPtr<PinPOD> pins;
});
NPNR_PACKED_STRUCT(struct VariantPOD {
@ -475,7 +482,7 @@ struct Arch : BaseArch<ArchRanges>
void route_gowin_globals(Context *ctx);
// chip db version
unsigned int const chipdb_version = 1;
unsigned int const chipdb_version = 2;
std::vector<IdString> cell_types;