sdf: Working on support for CVC
Signed-off-by: David Shah <dave@ds0.me>
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8343488bdf
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f2b9cc6d23
@ -150,6 +150,7 @@ po::options_description CommandHandler::getGeneralOptions()
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general.add_options()("timing-allow-fail", "allow timing to fail in design");
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general.add_options()("no-tmdriv", "disable timing-driven placement");
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general.add_options()("sdf", po::value<std::string>(), "SDF delay back-annotation file to write");
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general.add_options()("sdf-cvc", "enable tweaks for SDF file compatibility with the CVC simulator");
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return general;
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}
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@ -343,7 +344,7 @@ int CommandHandler::executeMain(std::unique_ptr<Context> ctx)
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std::ofstream f(filename);
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if (!f)
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log_error("Failed to open SDF file '%s' for writing.\n", filename.c_str());
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ctx->writeSDF(f);
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ctx->writeSDF(f, vm.count("sdf-cvc"));
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}
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#ifndef NO_PYTHON
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@ -809,7 +809,7 @@ struct Context : Arch, DeterministicRNG
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// --------------------------------------------------------------
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// provided by sdf.cc
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void writeSDF(std::ostream &out) const;
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void writeSDF(std::ostream &out, bool cvc_mode = false) const;
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// --------------------------------------------------------------
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@ -78,6 +78,7 @@ struct Interconnect
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struct SDFWriter
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{
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bool cvc_mode = false;
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std::vector<Cell> cells;
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std::vector<Interconnect> conn;
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std::string sdfversion, design, vendor, program;
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@ -98,7 +99,7 @@ struct SDFWriter
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{
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std::string esc;
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for (char c : name) {
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if (c == '$' || c == '\\' || c == '[' || c == ']' || c == ':')
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if (c == '$' || c == '\\' || c == '[' || c == ']' || c == ':' || (cvc_mode && c == '.'))
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esc += '\\';
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esc += c;
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}
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@ -128,10 +129,19 @@ struct SDFWriter
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void write_delay(std::ostream &out, const MinMaxTyp &delay)
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{
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out << "(" << delay.min << ":" << delay.typ << ":" << delay.max << ")";
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if (cvc_mode)
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out << "(" << int(delay.min) << ":" << int(delay.typ) << ":" << int(delay.max) << ")";
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else
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out << "(" << delay.min << ":" << delay.typ << ":" << delay.max << ")";
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}
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void write_port(std::ostream &out, const CellPort &port) { out << escape_name(port.cell + "/" + port.port); }
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void write_port(std::ostream &out, const CellPort &port)
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{
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if (cvc_mode)
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out << escape_name(port.cell) + "." + escape_name(port.port);
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else
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out << escape_name(port.cell + "/" + port.port);
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}
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void write_portedge(std::ostream &out, const PortAndEdge &pe)
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{
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@ -146,7 +156,7 @@ struct SDFWriter
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out << " (DESIGN " << format_name(design) << ")" << std::endl;
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out << " (VENDOR " << format_name(vendor) << ")" << std::endl;
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out << " (PROGRAM " << format_name(program) << ")" << std::endl;
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out << " (DIVIDER /)" << std::endl;
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out << " (DIVIDER " << (cvc_mode ? "." : "/") << ")" << std::endl;
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out << " (TIMESCALE 1ps)" << std::endl;
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// Write interconnect delays, with the main design begin a "cell"
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out << " (CELL" << std::endl;
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@ -210,10 +220,11 @@ struct SDFWriter
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} // namespace SDF
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void Context::writeSDF(std::ostream &out) const
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void Context::writeSDF(std::ostream &out, bool cvc_mode) const
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{
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using namespace SDF;
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SDFWriter wr;
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wr.cvc_mode = cvc_mode;
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wr.design = str_or_default(attrs, id("module"), "top");
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wr.sdfversion = "3.0";
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wr.vendor = "nextpnr";
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@ -69,7 +69,7 @@ std::unique_ptr<CellInfo> create_ice_cell(Context *ctx, IdString type, std::stri
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new_cell->params[ctx->id("PIN_TYPE")] = Property(0, 6);
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new_cell->params[ctx->id("PULLUP")] = Property::State::S0;
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new_cell->params[ctx->id("NEG_TRIGGER")] = Property::State::S0;
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new_cell->params[ctx->id("IOSTANDARD")] = Property("SB_LVCMOS");
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new_cell->params[ctx->id("IO_STANDARD")] = Property("SB_LVCMOS");
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add_port(ctx, new_cell.get(), "PACKAGE_PIN", PORT_INOUT);
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