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nexus: Support for split Vcc routing

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Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2021-09-22 14:10:20 +01:00
parent 035452d938
commit f395ad3e27
3 changed files with 7 additions and 0 deletions
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3
nexus/arch.cc
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@ -589,6 +589,9 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
delay_t Arch::estimateDelay(WireId src, WireId dst) const delay_t Arch::estimateDelay(WireId src, WireId dst) const
{ {
const auto &dst_data = wire_data(dst);
if (src.tile == 0 && dst_data.name == ID_LOCAL_VCC)
return 0;
int src_x = src.tile % chip_info->width, src_y = src.tile / chip_info->width; int src_x = src.tile % chip_info->width, src_y = src.tile / chip_info->width;
int dst_x = dst.tile % chip_info->width, dst_y = dst.tile / chip_info->width; int dst_x = dst.tile % chip_info->width, dst_y = dst.tile / chip_info->width;
int dist_x = std::abs(src_x - dst_x); int dist_x = std::abs(src_x - dst_x);

2
nexus/constids.inc
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@ -528,3 +528,5 @@ X(TOUT)
X(Q0) X(Q0)
X(Q1) X(Q1)
X(SCLK) X(SCLK)
X(LOCAL_VCC)

2
nexus/fasm.cc
View File

@ -211,6 +211,8 @@ struct NexusFasmWriter
return; return;
std::string tile = tile_name(pip.tile, tile_by_type_and_loc(pip.tile, IdString(pd.tile_type))); std::string tile = tile_name(pip.tile, tile_by_type_and_loc(pip.tile, IdString(pd.tile_type)));
std::string source_wire = escape_name(ctx->pip_src_wire_name(pip).str(ctx)); std::string source_wire = escape_name(ctx->pip_src_wire_name(pip).str(ctx));
if (source_wire == "LOCAL_VCC")
source_wire = "G__VCC";
std::string dest_wire = escape_name(ctx->pip_dst_wire_name(pip).str(ctx)); std::string dest_wire = escape_name(ctx->pip_dst_wire_name(pip).str(ctx));
out << stringf("%s.PIP.%s.%s", tile.c_str(), dest_wire.c_str(), source_wire.c_str()) << std::endl; out << stringf("%s.PIP.%s.%s", tile.c_str(), dest_wire.c_str(), source_wire.c_str()) << std::endl;
} }