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Merge branch 'master' of github.com:YosysHQ/nextpnr into constids

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This commit is contained in:
Clifford Wolf 2018-08-08 19:35:13 +02:00
commit f6189e4677
29 changed files with 1299 additions and 942 deletions
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263
common/command.cc Normal file
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@ -0,0 +1,263 @@
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef NO_GUI
#include <QApplication>
#include "application.h"
#include "mainwindow.h"
#endif
#ifndef NO_PYTHON
#include "pybindings.h"
#endif
#include <boost/filesystem/convenience.hpp>
#include <boost/program_options.hpp>
#include <fstream>
#include <iostream>
#include "command.h"
#include "design_utils.h"
#include "jsonparse.h"
#include "log.h"
#include "timing.h"
#include "version.h"
NEXTPNR_NAMESPACE_BEGIN
CommandHandler::CommandHandler(int argc, char **argv) : argc(argc), argv(argv) { log_files.push_back(stdout); }
bool CommandHandler::parseOptions()
{
options.add(getGeneralOptions()).add(getArchOptions());
try {
po::parsed_options parsed =
po::command_line_parser(argc, argv)
.style(po::command_line_style::default_style ^ po::command_line_style::allow_guessing)
.options(options)
.positional(pos)
.run();
po::store(parsed, vm);
po::notify(vm);
return true;
} catch (std::exception &e) {
std::cout << e.what() << "\n";
return false;
}
}
bool CommandHandler::executeBeforeContext()
{
if (vm.count("help") || argc == 1) {
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git sha1 " GIT_COMMIT_HASH_STR ")\n";
std::cout << options << "\n";
return argc != 1;
}
if (vm.count("version")) {
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git sha1 " GIT_COMMIT_HASH_STR ")\n";
return true;
}
validate();
return false;
}
po::options_description CommandHandler::getGeneralOptions()
{
po::options_description general("General options");
general.add_options()("help,h", "show help");
general.add_options()("verbose,v", "verbose output");
general.add_options()("debug", "debug output");
general.add_options()("force,f", "keep running after errors");
#ifndef NO_GUI
general.add_options()("gui", "start gui");
#endif
#ifndef NO_PYTHON
general.add_options()("run", po::value<std::vector<std::string>>(), "python file to execute");
pos.add("run", -1);
#endif
general.add_options()("json", po::value<std::string>(), "JSON design file to ingest");
general.add_options()("seed", po::value<int>(), "seed value for random number generator");
general.add_options()("slack_redist_iter", po::value<int>(), "number of iterations between slack redistribution");
general.add_options()("cstrweight", po::value<float>(), "placer weighting for relative constraint satisfaction");
general.add_options()("pack-only", "pack design only without placement or routing");
general.add_options()("version,V", "show version");
general.add_options()("test", "check architecture database integrity");
general.add_options()("freq", po::value<double>(), "set target frequency for design in MHz");
general.add_options()("no-tmdriv", "disable timing-driven placement");
general.add_options()("save", po::value<std::string>(), "project file to write");
general.add_options()("load", po::value<std::string>(), "project file to read");
return general;
}
void CommandHandler::setupContext(Context *ctx)
{
if (vm.count("verbose")) {
ctx->verbose = true;
}
if (vm.count("debug")) {
ctx->verbose = true;
ctx->debug = true;
}
if (vm.count("force")) {
ctx->force = true;
}
if (vm.count("seed")) {
ctx->rngseed(vm["seed"].as<int>());
}
if (vm.count("slack_redist_iter")) {
ctx->slack_redist_iter = vm["slack_redist_iter"].as<int>();
if (vm.count("freq") && vm["freq"].as<double>() == 0) {
ctx->auto_freq = true;
#ifndef NO_GUI
if (!vm.count("gui"))
#endif
log_warning("Target frequency not specified. Will optimise for max frequency.\n");
}
}
if (vm.count("cstrweight")) {
// ctx->placer_constraintWeight = vm["cstrweight"].as<float>();
}
if (vm.count("freq")) {
auto freq = vm["freq"].as<double>();
if (freq > 0)
ctx->target_freq = freq * 1e6;
}
ctx->timing_driven = true;
if (vm.count("no-tmdriv"))
ctx->timing_driven = false;
}
int CommandHandler::executeMain(std::unique_ptr<Context> ctx)
{
if (vm.count("test")) {
ctx->archcheck();
return 0;
}
#ifndef NO_GUI
if (vm.count("gui")) {
Application a(argc, argv);
MainWindow w(std::move(ctx), chipArgs);
try {
if (vm.count("json")) {
std::string filename = vm["json"].as<std::string>();
std::ifstream f(filename);
if (!parse_json_file(f, filename, w.getContext()))
log_error("Loading design failed.\n");
customAfterLoad(w.getContext());
w.updateJsonLoaded();
}
} catch (log_execution_error_exception) {
// show error is handled by gui itself
}
w.show();
return a.exec();
}
#endif
if (vm.count("json")) {
std::string filename = vm["json"].as<std::string>();
std::ifstream f(filename);
if (!parse_json_file(f, filename, ctx.get()))
log_error("Loading design failed.\n");
customAfterLoad(ctx.get());
}
if (vm.count("json") || vm.count("load")) {
if (!ctx->pack() && !ctx->force)
log_error("Packing design failed.\n");
assign_budget(ctx.get());
ctx->check();
print_utilisation(ctx.get());
if (!vm.count("pack-only")) {
if (!ctx->place() && !ctx->force)
log_error("Placing design failed.\n");
ctx->check();
if (!ctx->route() && !ctx->force)
log_error("Routing design failed.\n");
}
customBitstream(ctx.get());
}
#ifndef NO_PYTHON
if (vm.count("run")) {
init_python(argv[0], true);
python_export_global("ctx", *ctx);
std::vector<std::string> files = vm["run"].as<std::vector<std::string>>();
for (auto filename : files)
execute_python_file(filename.c_str());
deinit_python();
}
#endif
if (vm.count("save")) {
project.save(ctx.get(), vm["save"].as<std::string>());
}
return 0;
}
void CommandHandler::conflicting_options(const boost::program_options::variables_map &vm, const char *opt1,
const char *opt2)
{
if (vm.count(opt1) && !vm[opt1].defaulted() && vm.count(opt2) && !vm[opt2].defaulted()) {
std::string msg = "Conflicting options '" + std::string(opt1) + "' and '" + std::string(opt2) + "'.";
log_error("%s\n", msg.c_str());
}
}
int CommandHandler::exec()
{
try {
if (!parseOptions())
return -1;
if (executeBeforeContext())
return 0;
std::unique_ptr<Context> ctx;
if (vm.count("load")) {
ctx = project.load(vm["load"].as<std::string>());
} else {
ctx = createContext();
}
setupContext(ctx.get());
setupArchContext(ctx.get());
return executeMain(std::move(ctx));
} catch (log_execution_error_exception) {
return -1;
}
}
NEXTPNR_NAMESPACE_END

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common/command.h Normal file
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/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef COMMAND_H
#define COMMAND_H
#include <boost/program_options.hpp>
#include "nextpnr.h"
#include "project.h"
NEXTPNR_NAMESPACE_BEGIN
namespace po = boost::program_options;
class CommandHandler
{
public:
CommandHandler(int argc, char **argv);
virtual ~CommandHandler(){};
int exec();
protected:
virtual void setupArchContext(Context *ctx) = 0;
virtual std::unique_ptr<Context> createContext() = 0;
virtual po::options_description getArchOptions() = 0;
virtual void validate(){};
virtual void customAfterLoad(Context *ctx){};
virtual void customBitstream(Context *ctx){};
void conflicting_options(const boost::program_options::variables_map &vm, const char *opt1, const char *opt2);
private:
bool parseOptions();
bool executeBeforeContext();
void setupContext(Context *ctx);
int executeMain(std::unique_ptr<Context> ctx);
po::options_description getGeneralOptions();
protected:
po::variables_map vm;
ArchArgs chipArgs;
private:
po::options_description options;
po::positional_options_description pos;
int argc;
char **argv;
ProjectHandler project;
};
NEXTPNR_NAMESPACE_END
#endif // COMMAND_H

18
common/nextpnr.h
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@ -291,6 +291,19 @@ struct CellInfo : ArchCellInfo
// parent.[xyz] := 0 when (constr_parent == nullptr)
};
enum TimingPortClass
{
TMG_CLOCK_INPUT, // Clock input to a sequential cell
TMG_GEN_CLOCK, // Generated clock output (PLL, DCC, etc)
TMG_REGISTER_INPUT, // Input to a register, with an associated clock (may also have comb. fanout too)
TMG_REGISTER_OUTPUT, // Output from a register
TMG_COMB_INPUT, // Combinational input, no paths end here
TMG_COMB_OUTPUT, // Combinational output, no paths start here
TMG_STARTPOINT, // Unclocked primary startpoint, such as an IO cell output
TMG_ENDPOINT, // Unclocked primary endpoint, such as an IO cell input
TMG_IGNORE, // Asynchronous to all clocks, "don't care", and should be ignored (false path) for analysis
};
struct DeterministicRNG
{
uint64_t rngstate;
@ -371,6 +384,9 @@ struct BaseCtx
mutable std::unordered_map<std::string, int> *idstring_str_to_idx;
mutable std::vector<const std::string *> *idstring_idx_to_str;
// Project settings and config switches
std::unordered_map<IdString, std::string> settings;
// Placed nets and cells.
std::unordered_map<IdString, std::unique_ptr<NetInfo>> nets;
std::unordered_map<IdString, std::unique_ptr<CellInfo>> cells;
@ -437,7 +453,7 @@ struct BaseCtx
const Context *getCtx() const { return reinterpret_cast<const Context *>(this); }
template<typename T> const char *nameOf(const T *obj)
template <typename T> const char *nameOf(const T *obj)
{
if (obj == nullptr)
return "";

5
common/placer1.cc
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@ -236,7 +236,10 @@ class SAPlacer
temp = post_legalise_temp;
diameter *= post_legalise_dia_scale;
ctx->shuffle(autoplaced);
assign_budget(ctx);
// Legalisation is a big change so force a slack redistribution here
if (ctx->slack_redist_iter > 0)
assign_budget(ctx, true /* quiet */);
} else if (ctx->slack_redist_iter > 0 && iter % ctx->slack_redist_iter == 0) {
assign_budget(ctx, true /* quiet */);
}

86
common/project.cc Normal file
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@ -0,0 +1,86 @@
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "project.h"
#include <boost/filesystem/convenience.hpp>
#include <boost/property_tree/json_parser.hpp>
#include <fstream>
#include "jsonparse.h"
#include "log.h"
NEXTPNR_NAMESPACE_BEGIN
void ProjectHandler::save(Context *ctx, std::string filename)
{
std::ofstream f(filename);
pt::ptree root;
root.put("project.version", 1);
root.put("project.name", boost::filesystem::basename(filename));
root.put("project.arch.name", ctx->archId().c_str(ctx));
root.put("project.arch.type", ctx->archArgsToId(ctx->archArgs()).c_str(ctx));
/* root.put("project.input.json", );*/
root.put("project.params.freq", int(ctx->target_freq / 1e6));
root.put("project.params.seed", ctx->rngstate);
saveArch(ctx, root);
pt::write_json(f, root);
}
std::unique_ptr<Context> ProjectHandler::load(std::string filename)
{
std::unique_ptr<Context> ctx;
try {
pt::ptree root;
boost::filesystem::path proj(filename);
pt::read_json(filename, root);
log_info("Loading project %s...\n", filename.c_str());
log_break();
int version = root.get<int>("project.version");
if (version != 1)
log_error("Wrong project format version.\n");
ctx = createContext(root);
std::string arch_name = root.get<std::string>("project.arch.name");
if (arch_name != ctx->archId().c_str(ctx.get()))
log_error("Unsuported project architecture.\n");
auto project = root.get_child("project");
auto input = project.get_child("input");
std::string filename = input.get<std::string>("json");
boost::filesystem::path json = proj.parent_path() / filename;
std::ifstream f(json.string());
if (!parse_json_file(f, filename, ctx.get()))
log_error("Loading design failed.\n");
if (project.count("params")) {
auto params = project.get_child("params");
if (params.count("freq"))
ctx->target_freq = params.get<double>("freq") * 1e6;
if (params.count("seed"))
ctx->rngseed(params.get<uint64_t>("seed"));
}
loadArch(ctx.get(), root, proj.parent_path().string());
} catch (...) {
log_error("Error loading project file.\n");
}
return ctx;
}
NEXTPNR_NAMESPACE_END

42
common/project.h Normal file
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@ -0,0 +1,42 @@
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#ifndef PROJECT_H
#define PROJECT_H
#include <boost/property_tree/ptree.hpp>
#include "nextpnr.h"
NEXTPNR_NAMESPACE_BEGIN
namespace pt = boost::property_tree;
struct ProjectHandler
{
void save(Context *ctx, std::string filename);
std::unique_ptr<Context> load(std::string filename);
// implemented per arch
void saveArch(Context *ctx, pt::ptree &root);
std::unique_ptr<Context> createContext(pt::ptree &root);
void loadArch(Context *ctx, pt::ptree &root, std::string path);
};
NEXTPNR_NAMESPACE_END
#endif // PROJECT_H

355
common/timing.cc
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@ -20,6 +20,7 @@
#include "timing.h"
#include <algorithm>
#include <boost/range/adaptor/reversed.hpp>
#include <unordered_map>
#include <utility>
#include "log.h"
@ -36,10 +37,18 @@ struct Timing
bool net_delays;
bool update;
delay_t min_slack;
PortRefVector current_path;
PortRefVector *crit_path;
DelayFrequency *slack_histogram;
struct TimingData
{
TimingData() : max_arrival(), max_path_length(), min_remaining_budget() {}
TimingData(delay_t max_arrival) : max_arrival(max_arrival), max_path_length(), min_remaining_budget() {}
delay_t max_arrival;
unsigned max_path_length = 0;
delay_t min_remaining_budget;
};
Timing(Context *ctx, bool net_delays, bool update, PortRefVector *crit_path = nullptr,
DelayFrequency *slack_histogram = nullptr)
: ctx(ctx), net_delays(net_delays), update(update), min_slack(1.0e12 / ctx->target_freq),
@ -47,104 +56,256 @@ struct Timing
{
}
delay_t follow_net(NetInfo *net, int path_length, delay_t slack)
{
const delay_t default_budget = slack / (path_length + 1);
delay_t net_budget = default_budget;
for (auto &usr : net->users) {
auto delay = net_delays ? ctx->getNetinfoRouteDelay(net, usr) : delay_t();
if (crit_path)
current_path.push_back(&usr);
// If budget override exists, use that value and do not increment path_length
auto budget = default_budget;
if (ctx->getBudgetOverride(net, usr, budget)) {
if (update)
usr.budget = std::min(usr.budget, budget);
budget = follow_user_port(usr, path_length, slack - budget);
net_budget = std::min(net_budget, budget);
}
else {
budget = follow_user_port(usr, path_length + 1, slack - delay);
net_budget = std::min(net_budget, budget);
if (update)
usr.budget = std::min(usr.budget, delay + budget);
}
if (crit_path)
current_path.pop_back();
}
return net_budget;
}
// Follow a path, returning budget to annotate
delay_t follow_user_port(PortRef &user, int path_length, delay_t slack)
{
delay_t value;
if (ctx->getPortClock(user.cell, user.port) != IdString()) {
// At the end of a timing path (arguably, should check setup time
// here too)
value = slack / path_length;
if (slack < min_slack) {
min_slack = slack;
if (crit_path)
*crit_path = current_path;
}
if (slack_histogram) {
int slack_ps = ctx->getDelayNS(slack) * 1000;
(*slack_histogram)[slack_ps]++;
}
} else {
// Default to the path ending here, if no further paths found
value = slack / path_length;
// Follow outputs of the user
for (auto port : user.cell->ports) {
if (port.second.type == PORT_OUT) {
DelayInfo comb_delay;
// Look up delay through this path
bool is_path = ctx->getCellDelay(user.cell, user.port, port.first, comb_delay);
if (is_path) {
NetInfo *net = port.second.net;
if (net) {
delay_t path_budget = follow_net(net, path_length, slack - comb_delay.maxDelay());
value = std::min(value, path_budget);
}
}
}
}
}
return value;
}
delay_t walk_paths()
{
delay_t default_slack = delay_t(1.0e12 / ctx->target_freq);
const auto clk_period = delay_t(1.0e12 / ctx->target_freq);
// Go through all clocked drivers and distribute the available path
// slack evenly into the budget of every sink on the path
// First, compute the topographical order of nets to walk through the circuit, assuming it is a _acyclic_ graph
// TODO(eddieh): Handle the case where it is cyclic, e.g. combinatorial loops
std::vector<NetInfo *> topographical_order;
std::unordered_map<const NetInfo *, TimingData> net_data;
// In lieu of deleting edges from the graph, simply count the number of fanins to each output port
std::unordered_map<const PortInfo *, unsigned> port_fanin;
std::vector<IdString> input_ports;
std::vector<const PortInfo *> output_ports;
for (auto &cell : ctx->cells) {
for (auto port : cell.second->ports) {
if (port.second.type == PORT_OUT) {
IdString clock_domain = ctx->getPortClock(cell.second.get(), port.first);
if (clock_domain != IdString()) {
delay_t slack = default_slack; // TODO: clock constraints
input_ports.clear();
output_ports.clear();
for (auto &port : cell.second->ports) {
if (!port.second.net)
continue;
if (port.second.type == PORT_OUT)
output_ports.push_back(&port.second);
else
input_ports.push_back(port.first);
}
for (auto o : output_ports) {
IdString clockPort;
TimingPortClass portClass = ctx->getPortTimingClass(cell.second.get(), o->name, clockPort);
// If output port is influenced by a clock (e.g. FF output) then add it to the ordering as a timing
// start-point
if (portClass == TMG_REGISTER_OUTPUT) {
DelayInfo clkToQ;
if (ctx->getCellDelay(cell.second.get(), clock_domain, port.first, clkToQ))
slack -= clkToQ.maxDelay();
if (port.second.net)
follow_net(port.second.net, 0, slack);
ctx->getCellDelay(cell.second.get(), clockPort, o->name, clkToQ);
topographical_order.emplace_back(o->net);
net_data.emplace(o->net, TimingData{clkToQ.maxDelay()});
} else {
// TODO(eddieh): Generated clocks and ignored ports are currently added into the ordering as if it
// was a regular timing start point in order to enable the full topographical order to be computed,
// however these false nets (and their downstream paths) should not be in the final ordering
if (portClass == TMG_STARTPOINT || portClass == TMG_GEN_CLOCK || portClass == TMG_IGNORE) {
topographical_order.emplace_back(o->net);
net_data.emplace(o->net, TimingData{});
}
// Otherwise, for all driven input ports on this cell, if a timing arc exists between the input and
// the current output port, increment fanin counter
for (auto i : input_ports) {
DelayInfo comb_delay;
bool is_path = ctx->getCellDelay(cell.second.get(), i, o->name, comb_delay);
if (is_path)
port_fanin[o]++;
}
}
}
}
// If these constant nets exist, add them to the topographical ordering too
// TODO(eddieh): Also false paths and should be removed from ordering
auto it = ctx->nets.find(ctx->id("$PACKER_VCC_NET"));
if (it != ctx->nets.end()) {
topographical_order.emplace_back(it->second.get());
net_data.emplace(it->second.get(), TimingData{});
}
it = ctx->nets.find(ctx->id("$PACKER_GND_NET"));
if (it != ctx->nets.end()) {
topographical_order.emplace_back(it->second.get());
net_data.emplace(it->second.get(), TimingData{});
}
std::deque<NetInfo *> queue(topographical_order.begin(), topographical_order.end());
// Now walk the design, from the start points identified previously, building up a topographical order
while (!queue.empty()) {
const auto net = queue.front();
queue.pop_front();
for (auto &usr : net->users) {
IdString clockPort;
TimingPortClass usrClass = ctx->getPortTimingClass(usr.cell, usr.port, clockPort);
if (usrClass == TMG_IGNORE || usrClass == TMG_CLOCK_INPUT)
continue;
for (auto &port : usr.cell->ports) {
if (port.second.type != PORT_OUT || !port.second.net)
continue;
TimingPortClass portClass = ctx->getPortTimingClass(usr.cell, port.first, clockPort);
// Skip if this is a clocked output (but allow non-clocked ones)
if (portClass == TMG_REGISTER_OUTPUT || portClass == TMG_STARTPOINT || portClass == TMG_IGNORE ||
portClass == TMG_GEN_CLOCK)
continue;
DelayInfo comb_delay;
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
if (!is_path)
continue;
// Decrement the fanin count, and only add to topographical order if all its fanins have already
// been visited
auto it = port_fanin.find(&port.second);
NPNR_ASSERT(it != port_fanin.end());
if (--it->second == 0) {
topographical_order.emplace_back(port.second.net);
queue.emplace_back(port.second.net);
port_fanin.erase(it);
}
}
}
}
// Sanity check to ensure that all ports where fanins were recorded were indeed visited
NPNR_ASSERT(port_fanin.empty());
// Go forwards topographically to find the maximum arrival time and max path length for each net
for (auto net : topographical_order) {
auto &nd = net_data.at(net);
const auto net_arrival = nd.max_arrival;
const auto net_length_plus_one = nd.max_path_length + 1;
nd.min_remaining_budget = clk_period;
for (auto &usr : net->users) {
IdString clockPort;
TimingPortClass portClass = ctx->getPortTimingClass(usr.cell, usr.port, clockPort);
if (portClass == TMG_REGISTER_INPUT || portClass == TMG_ENDPOINT || portClass == TMG_IGNORE) {
} else {
auto net_delay = net_delays ? ctx->getNetinfoRouteDelay(net, usr) : delay_t();
auto budget_override = ctx->getBudgetOverride(net, usr, net_delay);
auto usr_arrival = net_arrival + net_delay;
// Iterate over all output ports on the same cell as the sink
for (auto port : usr.cell->ports) {
if (port.second.type != PORT_OUT || !port.second.net)
continue;
DelayInfo comb_delay;
// Look up delay through this path
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
if (!is_path)
continue;
auto &data = net_data[port.second.net];
auto &arrival = data.max_arrival;
arrival = std::max(arrival, usr_arrival + comb_delay.maxDelay());
if (!budget_override) { // Do not increment path length if budget overriden since it doesn't
// require a share of the slack
auto &path_length = data.max_path_length;
path_length = std::max(path_length, net_length_plus_one);
}
}
}
}
}
const NetInfo *crit_net = nullptr;
// Now go backwards topographically to determine the minimum path slack, and to distribute all path slack evenly
// between all nets on the path
for (auto net : boost::adaptors::reverse(topographical_order)) {
auto &nd = net_data.at(net);
const delay_t net_length_plus_one = nd.max_path_length + 1;
auto &net_min_remaining_budget = nd.min_remaining_budget;
for (auto &usr : net->users) {
auto net_delay = net_delays ? ctx->getNetinfoRouteDelay(net, usr) : delay_t();
auto budget_override = ctx->getBudgetOverride(net, usr, net_delay);
IdString associatedClock;
TimingPortClass portClass = ctx->getPortTimingClass(usr.cell, usr.port, associatedClock);
if (portClass == TMG_REGISTER_INPUT || portClass == TMG_ENDPOINT) {
const auto net_arrival = nd.max_arrival;
auto path_budget = clk_period - (net_arrival + net_delay);
if (update) {
auto budget_share = budget_override ? 0 : path_budget / net_length_plus_one;
usr.budget = std::min(usr.budget, net_delay + budget_share);
net_min_remaining_budget = std::min(net_min_remaining_budget, path_budget - budget_share);
}
if (path_budget < min_slack) {
min_slack = path_budget;
if (crit_path) {
crit_path->clear();
crit_path->push_back(&usr);
crit_net = net;
}
}
if (slack_histogram) {
int slack_ps = ctx->getDelayNS(path_budget) * 1000;
(*slack_histogram)[slack_ps]++;
}
} else if (update) {
// Iterate over all output ports on the same cell as the sink
for (const auto &port : usr.cell->ports) {
if (port.second.type != PORT_OUT || !port.second.net)
continue;
DelayInfo comb_delay;
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
if (!is_path)
continue;
auto path_budget = net_data.at(port.second.net).min_remaining_budget;
auto budget_share = budget_override ? 0 : path_budget / net_length_plus_one;
usr.budget = std::min(usr.budget, net_delay + budget_share);
net_min_remaining_budget = std::min(net_min_remaining_budget, path_budget - budget_share);
}
}
}
}
if (crit_path) {
// Walk backwards from the most critical net
while (crit_net) {
const PortInfo *crit_ipin = nullptr;
delay_t max_arrival = std::numeric_limits<delay_t>::min();
// Look at all input ports on its driving cell
for (const auto &port : crit_net->driver.cell->ports) {
if (port.second.type != PORT_IN || !port.second.net)
continue;
DelayInfo comb_delay;
bool is_path =
ctx->getCellDelay(crit_net->driver.cell, port.first, crit_net->driver.port, comb_delay);
if (!is_path)
continue;
// If input port is influenced by a clock, skip
IdString portClock;
TimingPortClass portClass = ctx->getPortTimingClass(crit_net->driver.cell, port.first, portClock);
if (portClass == TMG_REGISTER_INPUT || portClass == TMG_CLOCK_INPUT || portClass == TMG_ENDPOINT ||
portClass == TMG_IGNORE)
continue;
// And find the fanin net with the latest arrival time
const auto net_arrival = net_data.at(port.second.net).max_arrival;
if (net_arrival > max_arrival) {
max_arrival = net_arrival;
crit_ipin = &port.second;
}
}
if (!crit_ipin)
break;
// Now convert PortInfo* into a PortRef*
for (auto &usr : crit_ipin->net->users) {
if (usr.cell->name == crit_net->driver.cell->name && usr.port == crit_ipin->name) {
crit_path->push_back(&usr);
break;
}
}
crit_net = crit_ipin->net;
}
std::reverse(crit_path->begin(), crit_path->end());
}
return min_slack;
}
void assign_budget()
{
// Clear delays to a very high value first
delay_t default_slack = delay_t(1.0e12 / ctx->target_freq);
for (auto &net : ctx->nets) {
for (auto &usr : net.second->users) {
usr.budget = default_slack;
usr.budget = std::numeric_limits<delay_t>::max();
}
}
@ -180,16 +341,15 @@ void assign_budget(Context *ctx, bool quiet)
}
}
// For slack redistribution, if user has not specified a frequency
// dynamically adjust the target frequency to be the currently
// achieved maximum
// For slack redistribution, if user has not specified a frequency dynamically adjust the target frequency to be the
// currently achieved maximum
if (ctx->auto_freq && ctx->slack_redist_iter > 0) {
delay_t default_slack = delay_t(1.0e12 / ctx->target_freq);
ctx->target_freq = 1e12 / (default_slack - timing.min_slack);
delay_t default_slack = delay_t((1.0e9 / ctx->getDelayNS(1)) / ctx->target_freq);
ctx->target_freq = 1.0e9 / ctx->getDelayNS(default_slack - timing.min_slack);
if (ctx->verbose)
log_info("minimum slack for this assign = %d, target Fmax for next "
log_info("minimum slack for this assign = %.2f ns, target Fmax for next "
"update = %.2f MHz\n",
timing.min_slack, ctx->target_freq / 1e6);
ctx->getDelayNS(timing.min_slack), ctx->target_freq / 1e6);
}
if (!quiet)
@ -217,7 +377,9 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_path)
auto &front = crit_path.front();
auto &front_port = front->cell->ports.at(front->port);
auto &front_driver = front_port.net->driver;
auto last_port = ctx->getPortClock(front_driver.cell, front_driver.port);
IdString last_port;
ctx->getPortTimingClass(front_driver.cell, front_driver.port, last_port);
for (auto sink : crit_path) {
auto sink_cell = sink->cell;
auto &port = sink_cell->ports.at(sink->port);
@ -227,14 +389,15 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_path)
DelayInfo comb_delay;
ctx->getCellDelay(sink_cell, last_port, driver.port, comb_delay);
total += comb_delay.maxDelay();
log_info("%4d %4d Source %s.%s\n", comb_delay.maxDelay(), total, driver_cell->name.c_str(ctx),
driver.port.c_str(ctx));
log_info("%4.1f %4.1f Source %s.%s\n", ctx->getDelayNS(comb_delay.maxDelay()), ctx->getDelayNS(total),
driver_cell->name.c_str(ctx), driver.port.c_str(ctx));
auto net_delay = ctx->getNetinfoRouteDelay(net, *sink);
total += net_delay;
auto driver_loc = ctx->getBelLocation(driver_cell->bel);
auto sink_loc = ctx->getBelLocation(sink_cell->bel);
log_info("%4d %4d Net %s budget %d (%d,%d) -> (%d,%d)\n", net_delay, total, net->name.c_str(ctx),
sink->budget, driver_loc.x, driver_loc.y, sink_loc.x, sink_loc.y);
log_info("%4.1f %4.1f Net %s budget %f ns (%d,%d) -> (%d,%d)\n", ctx->getDelayNS(net_delay),
ctx->getDelayNS(total), net->name.c_str(ctx), ctx->getDelayNS(sink->budget), driver_loc.x,
driver_loc.y, sink_loc.x, sink_loc.y);
log_info(" Sink %s.%s\n", sink_cell->name.c_str(ctx), sink->port.c_str(ctx));
last_port = sink->port;
}
@ -242,8 +405,8 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_path)
}
}
delay_t default_slack = delay_t(1.0e12 / ctx->target_freq);
log_info("estimated Fmax = %.2f MHz\n", 1e6 / (default_slack - min_slack));
delay_t default_slack = delay_t((1.0e9 / ctx->getDelayNS(1)) / ctx->target_freq);
log_info("estimated Fmax = %.2f MHz\n", 1e3 / ctx->getDelayNS(default_slack - min_slack));
if (print_histogram && slack_histogram.size() > 0) {
constexpr unsigned num_bins = 20;

10
docs/archapi.md
View File

@ -431,13 +431,11 @@ Cell Delay Methods
Returns the delay for the specified path through a cell in the `&delay` argument. The method returns
false if there is no timing relationship from `fromPort` to `toPort`.
### IdString getPortClock(const CellInfo \*cell, IdString port) const
### TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const
Returns the clock input port for the specified output port.
### bool isClockPort(const CellInfo \*cell, IdString port) const
Returns true if the specified port is a clock input.
Return the _timing port class_ of a port. This can be a register or combinational input or output; clock input or
output; general startpoint or endpoint; or a port ignored for timing purposes. For register ports, clockPort is set
to the associated clock port.
Placer Methods
--------------

8
ecp5/arch.cc
View File

@ -330,7 +330,6 @@ BelId Arch::getPioByFunctionName(const std::string &name) const
}
std::vector<IdString> Arch::getBelPins(BelId bel) const
{
std::vector<IdString> ret;
NPNR_ASSERT(bel != BelId());
@ -454,9 +453,10 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort
return false;
}
IdString Arch::getPortClock(const CellInfo *cell, IdString port) const { return IdString(); }
bool Arch::isClockPort(const CellInfo *cell, IdString port) const { return false; }
TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const
{
return TMG_IGNORE;
}
std::vector<std::pair<std::string, std::string>> Arch::getTilesAtLocation(int row, int col)
{

7
ecp5/arch.h
View File

@ -414,6 +414,7 @@ struct Arch : BaseCtx
std::string getChipName() const;
IdString archId() const { return id("ecp5"); }
ArchArgs archArgs() const { return args; }
IdString archArgsToId(ArchArgs args) const;
// -------------------------------------------------
@ -824,10 +825,8 @@ struct Arch : BaseCtx
// Get the delay through a cell from one port to another, returning false
// if no path exists
bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
// Get the associated clock to a port, or empty if the port is combinational
IdString getPortClock(const CellInfo *cell, IdString port) const;
// Return true if a port is a clock
bool isClockPort(const CellInfo *cell, IdString port) const;
// Get the port class, also setting clockPort if applicable
TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const;
// Return true if a port is a net
bool isGlobalNet(const NetInfo *net) const;

219
ecp5/main.cc
View File

@ -19,161 +19,50 @@
#ifdef MAIN_EXECUTABLE
#ifndef NO_GUI
#include <QApplication>
#include "application.h"
#include "mainwindow.h"
#endif
#ifndef NO_PYTHON
#include "pybindings.h"
#endif
#include <boost/filesystem/convenience.hpp>
#include <boost/program_options.hpp>
#include <fstream>
#include <iostream>
#include "log.h"
#include "nextpnr.h"
#include "version.h"
#include "bitstream.h"
#include "command.h"
#include "design_utils.h"
#include "jsonparse.h"
#include "log.h"
#include "timing.h"
USING_NEXTPNR_NAMESPACE
int main(int argc, char *argv[])
class ECP5CommandHandler : public CommandHandler
{
try {
public:
ECP5CommandHandler(int argc, char **argv);
virtual ~ECP5CommandHandler(){};
std::unique_ptr<Context> createContext() override;
void setupArchContext(Context *ctx) override{};
void validate() override;
void customBitstream(Context *ctx) override;
namespace po = boost::program_options;
int rc = 0;
protected:
po::options_description getArchOptions();
};
log_files.push_back(stdout);
ECP5CommandHandler::ECP5CommandHandler(int argc, char **argv) : CommandHandler(argc, argv) {}
po::options_description options("Allowed options");
options.add_options()("help,h", "show help");
options.add_options()("verbose,v", "verbose output");
options.add_options()("force,f", "keep running after errors");
#ifndef NO_GUI
options.add_options()("gui", "start gui");
#endif
options.add_options()("test", "check architecture database integrity");
options.add_options()("25k", "set device type to LFE5U-25F");
options.add_options()("45k", "set device type to LFE5U-45F");
options.add_options()("85k", "set device type to LFE5U-85F");
options.add_options()("package", po::value<std::string>(), "select device package (defaults to CABGA381)");
options.add_options()("json", po::value<std::string>(), "JSON design file to ingest");
options.add_options()("seed", po::value<int>(), "seed value for random number generator");
options.add_options()("basecfg", po::value<std::string>(), "base chip configuration in Trellis text format");
options.add_options()("textcfg", po::value<std::string>(), "textual configuration in Trellis format to write");
po::positional_options_description pos;
#ifndef NO_PYTHON
options.add_options()("run", po::value<std::vector<std::string>>(), "python file to execute");
pos.add("run", -1);
#endif
options.add_options()("version,V", "show version");
po::variables_map vm;
try {
po::parsed_options parsed = po::command_line_parser(argc, argv).options(options).positional(pos).run();
po::store(parsed, vm);
po::notify(vm);
}
catch (std::exception &e) {
std::cout << e.what() << "\n";
return 1;
}
if (vm.count("help") || argc == 1) {
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git "
"sha1 " GIT_COMMIT_HASH_STR ")\n";
std::cout << "\n";
std::cout << options << "\n";
return argc != 1;
}
if (vm.count("version")) {
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git "
"sha1 " GIT_COMMIT_HASH_STR ")\n";
return 1;
}
ArchArgs args;
args.type = ArchArgs::LFE5U_45F;
if (vm.count("25k"))
args.type = ArchArgs::LFE5U_25F;
if (vm.count("45k"))
args.type = ArchArgs::LFE5U_45F;
if (vm.count("85k"))
args.type = ArchArgs::LFE5U_85F;
if (vm.count("package"))
args.package = vm["package"].as<std::string>();
else
args.package = "CABGA381";
args.speed = 6;
std::unique_ptr<Context> ctx = std::unique_ptr<Context>(new Context(args));
if (vm.count("verbose")) {
ctx->verbose = true;
}
if (vm.count("force")) {
ctx->force = true;
}
if (vm.count("seed")) {
ctx->rngseed(vm["seed"].as<int>());
}
ctx->timing_driven = true;
if (vm.count("no-tmdriv"))
ctx->timing_driven = false;
if (vm.count("test"))
ctx->archcheck();
#ifndef NO_GUI
if (vm.count("gui")) {
Application a(argc, argv);
MainWindow w(std::move(ctx), args);
w.show();
return a.exec();
}
#endif
if (vm.count("json")) {
std::string filename = vm["json"].as<std::string>();
std::ifstream f(filename);
if (!parse_json_file(f, filename, ctx.get()))
log_error("Loading design failed.\n");
if (!ctx->pack() && !ctx->force)
log_error("Packing design failed.\n");
if (vm.count("freq"))
ctx->target_freq = vm["freq"].as<double>() * 1e6;
assign_budget(ctx.get());
ctx->check();
print_utilisation(ctx.get());
if (!ctx->place() && !ctx->force)
log_error("Placing design failed.\n");
ctx->check();
if (!ctx->route() && !ctx->force)
log_error("Routing design failed.\n");
po::options_description ECP5CommandHandler::getArchOptions()
{
po::options_description specific("Architecture specific options");
specific.add_options()("25k", "set device type to LFE5U-25F");
specific.add_options()("45k", "set device type to LFE5U-45F");
specific.add_options()("85k", "set device type to LFE5U-85F");
specific.add_options()("package", po::value<std::string>(), "select device package (defaults to CABGA381)");
specific.add_options()("basecfg", po::value<std::string>(), "base chip configuration in Trellis text format");
specific.add_options()("textcfg", po::value<std::string>(), "textual configuration in Trellis format to write");
return specific;
}
void ECP5CommandHandler::validate()
{
if ((vm.count("25k") + vm.count("45k") + vm.count("85k")) > 1)
log_error("Only one device type can be set\n");
}
void ECP5CommandHandler::customBitstream(Context *ctx)
{
std::string basecfg;
if (vm.count("basecfg"))
basecfg = vm["basecfg"].as<std::string>();
@ -181,29 +70,33 @@ int main(int argc, char *argv[])
std::string textcfg;
if (vm.count("textcfg"))
textcfg = vm["textcfg"].as<std::string>();
write_bitstream(ctx.get(), basecfg, textcfg);
}
#ifndef NO_PYTHON
if (vm.count("run")) {
init_python(argv[0], true);
python_export_global("ctx", ctx);
write_bitstream(ctx, basecfg, textcfg);
}
std::vector<std::string> files = vm["run"].as<std::vector<std::string>>();
for (auto filename : files)
execute_python_file(filename.c_str());
std::unique_ptr<Context> ECP5CommandHandler::createContext()
{
chipArgs.type = ArchArgs::LFE5U_45F;
deinit_python();
}
#endif
return rc;
} catch (log_execution_error_exception) {
#if defined(_MSC_VER)
_exit(EXIT_FAILURE);
#else
_Exit(EXIT_FAILURE);
#endif
}
if (vm.count("25k"))
chipArgs.type = ArchArgs::LFE5U_25F;
if (vm.count("45k"))
chipArgs.type = ArchArgs::LFE5U_45F;
if (vm.count("85k"))
chipArgs.type = ArchArgs::LFE5U_85F;
if (vm.count("package"))
chipArgs.package = vm["package"].as<std::string>();
else
chipArgs.package = "CABGA381";
chipArgs.speed = 6;
return std::unique_ptr<Context>(new Context(chipArgs));
}
int main(int argc, char *argv[])
{
ECP5CommandHandler handler(argc, argv);
return handler.exec();
}
#endif

55
ecp5/project.cc Normal file
View File

@ -0,0 +1,55 @@
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "project.h"
#include <boost/filesystem/convenience.hpp>
#include <boost/property_tree/json_parser.hpp>
#include <fstream>
#include "log.h"
NEXTPNR_NAMESPACE_BEGIN
void ProjectHandler::saveArch(Context *ctx, pt::ptree &root)
{
root.put("project.arch.package", ctx->archArgs().package);
root.put("project.arch.speed", ctx->archArgs().speed);
}
std::unique_ptr<Context> ProjectHandler::createContext(pt::ptree &root)
{
ArchArgs chipArgs;
std::string arch_type = root.get<std::string>("project.arch.type");
if (arch_type == "25k") {
chipArgs.type = ArchArgs::LFE5U_25F;
}
if (arch_type == "45k") {
chipArgs.type = ArchArgs::LFE5U_45F;
}
if (arch_type == "85k") {
chipArgs.type = ArchArgs::LFE5U_85F;
}
chipArgs.package = root.get<std::string>("project.arch.package");
chipArgs.speed = root.get<int>("project.arch.speed");
return std::unique_ptr<Context>(new Context(chipArgs));
}
void ProjectHandler::loadArch(Context *ctx, pt::ptree &root, std::string path) {}
NEXTPNR_NAMESPACE_END

10
generic/arch.cc
View File

@ -175,7 +175,7 @@ void Arch::setGroupDecal(GroupId group, DecalXY decalxy)
// ---------------------------------------------------------------
Arch::Arch(ArchArgs) : chipName("generic") {}
Arch::Arch(ArchArgs args) : chipName("generic"), args(args) {}
void IdString::initialize_arch(const BaseCtx *ctx) {}
@ -435,9 +435,11 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort
return false;
}
IdString Arch::getPortClock(const CellInfo *cell, IdString port) const { return IdString(); }
bool Arch::isClockPort(const CellInfo *cell, IdString port) const { return false; }
// Get the port class, also setting clockPort if applicable
TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const
{
return TMG_IGNORE;
}
bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const { return true; }
bool Arch::isBelLocationValid(BelId bel) const { return true; }

6
generic/arch.h
View File

@ -121,11 +121,13 @@ struct Arch : BaseCtx
// ---------------------------------------------------------------
// Common Arch API. Every arch must provide the following methods.
ArchArgs args;
Arch(ArchArgs args);
std::string getChipName() const { return chipName; }
IdString archId() const { return id("generic"); }
ArchArgs archArgs() const { return args; }
IdString archArgsToId(ArchArgs args) const { return id("none"); }
int getGridDimX() const { return gridDimX; }
@ -207,8 +209,8 @@ struct Arch : BaseCtx
DecalXY getGroupDecal(GroupId group) const;
bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
IdString getPortClock(const CellInfo *cell, IdString port) const;
bool isClockPort(const CellInfo *cell, IdString port) const;
// Get the port class, also setting clockPort if applicable
TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const;
bool isValidBelForCell(CellInfo *cell, BelId bel) const;
bool isBelLocationValid(BelId bel) const;

146
generic/main.cc
View File

@ -19,123 +19,47 @@
#ifdef MAIN_EXECUTABLE
#ifndef NO_GUI
#include <QApplication>
#include "application.h"
#include "mainwindow.h"
#endif
#ifndef NO_PYTHON
#include "pybindings.h"
#endif
#include <boost/filesystem/convenience.hpp>
#include <boost/program_options.hpp>
#include <iostream>
#include <fstream>
#include "command.h"
#include "design_utils.h"
#include "log.h"
#include "nextpnr.h"
#include "version.h"
#include "timing.h"
USING_NEXTPNR_NAMESPACE
class GenericCommandHandler : public CommandHandler
{
public:
GenericCommandHandler(int argc, char **argv);
virtual ~GenericCommandHandler(){};
std::unique_ptr<Context> createContext() override;
void setupArchContext(Context *ctx) override{};
void customBitstream(Context *ctx) override;
protected:
po::options_description getArchOptions();
};
GenericCommandHandler::GenericCommandHandler(int argc, char **argv) : CommandHandler(argc, argv) {}
po::options_description GenericCommandHandler::getArchOptions()
{
po::options_description specific("Architecture specific options");
specific.add_options()("generic", "set device type to generic");
return specific;
}
void GenericCommandHandler::customBitstream(Context *ctx) { log_error("Here is when bitstream gets created"); }
std::unique_ptr<Context> GenericCommandHandler::createContext()
{
return std::unique_ptr<Context>(new Context(chipArgs));
}
int main(int argc, char *argv[])
{
try {
namespace po = boost::program_options;
int rc = 0;
log_files.push_back(stdout);
po::options_description options("Allowed options");
options.add_options()("help,h", "show help");
options.add_options()("verbose,v", "verbose output");
options.add_options()("force,f", "keep running after errors");
#ifndef NO_GUI
options.add_options()("gui", "start gui");
#endif
po::positional_options_description pos;
#ifndef NO_PYTHON
options.add_options()("run", po::value<std::vector<std::string>>(), "python file to execute");
pos.add("run", -1);
#endif
options.add_options()("version,V", "show version");
po::variables_map vm;
try {
po::parsed_options parsed = po::command_line_parser(argc, argv).options(options).positional(pos).run();
po::store(parsed, vm);
po::notify(vm);
}
catch (std::exception &e) {
std::cout << e.what() << "\n";
return 1;
}
if (vm.count("help") || argc == 1) {
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git "
"sha1 " GIT_COMMIT_HASH_STR ")\n";
std::cout << "\n";
std::cout << options << "\n";
return argc != 1;
}
if (vm.count("version")) {
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git "
"sha1 " GIT_COMMIT_HASH_STR ")\n";
return 1;
}
ArchArgs chipArgs{};
std::unique_ptr<Context> ctx = std::unique_ptr<Context>(new Context(chipArgs));
if (vm.count("verbose")) {
ctx->verbose = true;
}
if (vm.count("force")) {
ctx->force = true;
}
if (vm.count("seed")) {
ctx->rngseed(vm["seed"].as<int>());
}
#ifndef NO_GUI
if (vm.count("gui")) {
Application a(argc, argv);
MainWindow w(std::move(ctx), chipArgs);
w.show();
return a.exec();
}
#endif
#ifndef NO_PYTHON
if (vm.count("run")) {
init_python(argv[0], true);
python_export_global("ctx", *ctx.get());
std::vector<std::string> files = vm["run"].as<std::vector<std::string>>();
for (auto filename : files)
execute_python_file(filename.c_str());
deinit_python();
}
#endif
return rc;
} catch (log_execution_error_exception) {
#if defined(_MSC_VER)
_exit(EXIT_FAILURE);
#else
_Exit(EXIT_FAILURE);
#endif
}
GenericCommandHandler handler(argc, argv);
return handler.exec();
}
#endif

37
generic/project.cc Normal file
View File

@ -0,0 +1,37 @@
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "project.h"
#include <boost/filesystem/convenience.hpp>
#include <fstream>
#include "log.h"
NEXTPNR_NAMESPACE_BEGIN
void ProjectHandler::saveArch(Context *ctx, pt::ptree &root) {}
std::unique_ptr<Context> ProjectHandler::createContext(pt::ptree &root)
{
ArchArgs chipArgs;
return std::unique_ptr<Context>(new Context(chipArgs));
}
void ProjectHandler::loadArch(Context *ctx, pt::ptree &root, std::string path) {}
NEXTPNR_NAMESPACE_END

42
gui/basewindow.cc
View File

@ -31,6 +31,7 @@
#include "jsonparse.h"
#include "log.h"
#include "mainwindow.h"
#include "project.h"
#include "pythontab.h"
static void initBasenameResource() { Q_INIT_RESOURCE(base); }
@ -302,8 +303,7 @@ void BaseMainWindow::load_json(std::string filename)
if (parse_json_file(f, filename, ctx.get())) {
log("Loading design successful.\n");
Q_EMIT updateTreeView();
actionPack->setEnabled(true);
onJsonLoaded();
updateJsonLoaded();
} else {
actionLoadJSON->setEnabled(true);
log("Loading design failed.\n");
@ -425,4 +425,42 @@ void BaseMainWindow::disableActions()
onDisableActions();
}
void BaseMainWindow::updateJsonLoaded()
{
disableActions();
actionPack->setEnabled(true);
onJsonLoaded();
}
void BaseMainWindow::open_proj()
{
QString fileName = QFileDialog::getOpenFileName(this, QString("Open Project"), QString(), QString("*.proj"));
if (!fileName.isEmpty()) {
try {
ProjectHandler proj;
disableActions();
ctx = proj.load(fileName.toStdString());
Q_EMIT contextChanged(ctx.get());
log_info("Loaded project %s...\n", fileName.toStdString().c_str());
updateJsonLoaded();
onProjectLoaded();
} catch (log_execution_error_exception) {
}
}
}
void BaseMainWindow::save_proj()
{
if (currentProj.empty()) {
QString fileName = QFileDialog::getSaveFileName(this, QString("Save Project"), QString(), QString("*.proj"));
if (fileName.isEmpty())
return;
currentProj = fileName.toStdString();
}
if (!currentProj.empty()) {
ProjectHandler proj;
proj.save(ctx.get(), currentProj);
}
}
NEXTPNR_NAMESPACE_END

12
gui/basewindow.h
View File

@ -48,14 +48,16 @@ class BaseMainWindow : public QMainWindow
explicit BaseMainWindow(std::unique_ptr<Context> context, ArchArgs args, QWidget *parent = 0);
virtual ~BaseMainWindow();
Context *getContext() { return ctx.get(); }
void load_json(std::string filename);
void updateJsonLoaded();
protected:
void createMenusAndBars();
void disableActions();
void load_json(std::string filename);
virtual void onDisableActions(){};
virtual void onJsonLoaded(){};
virtual void onProjectLoaded(){};
virtual void onPackFinished(){};
virtual void onBudgetFinished(){};
virtual void onPlaceFinished(){};
@ -66,8 +68,9 @@ class BaseMainWindow : public QMainWindow
void closeTab(int index);
virtual void new_proj() = 0;
virtual void open_proj() = 0;
virtual bool save_proj() = 0;
void open_proj();
void save_proj();
void open_json();
void budget();
@ -93,6 +96,7 @@ class BaseMainWindow : public QMainWindow
TaskManager *task;
bool timing_driven;
std::string currentJson;
std::string currentProj;
// main widgets
QTabWidget *tabWidget;

14
gui/ecp5/mainwindow.cc
View File

@ -29,7 +29,8 @@ static void initMainResource() { Q_INIT_RESOURCE(nextpnr); }
NEXTPNR_NAMESPACE_BEGIN
MainWindow::MainWindow(std::unique_ptr<Context> context, ArchArgs args, QWidget *parent) : BaseMainWindow(std::move(context), args, parent)
MainWindow::MainWindow(std::unique_ptr<Context> context, ArchArgs args, QWidget *parent)
: BaseMainWindow(std::move(context), args, parent)
{
initMainResource();
@ -50,7 +51,8 @@ void MainWindow::newContext(Context *ctx)
setWindowTitle(title.c_str());
}
void MainWindow::createMenu() {
void MainWindow::createMenu()
{
// Add arch specific actions
actionLoadBase = new QAction("Open Base Config", this);
actionLoadBase->setIcon(QIcon(":/icons/resources/open_base.png"));
@ -96,8 +98,8 @@ static QStringList getSupportedPackages(ArchArgs::ArchArgsTypes chip)
return packages;
}
void MainWindow::new_proj() {
void MainWindow::new_proj()
{
QMap<QString, int> arch;
arch.insert("Lattice ECP5 25K", ArchArgs::LFE5U_25F);
arch.insert("Lattice ECP5 45K", ArchArgs::LFE5U_45F);
@ -124,10 +126,6 @@ void MainWindow::new_proj() {
}
}
void MainWindow::open_proj() {}
bool MainWindow::save_proj() { return false; }
void MainWindow::load_base_config(std::string filename)
{
disableActions();

3
gui/ecp5/mainwindow.h
View File

@ -42,11 +42,10 @@ class MainWindow : public BaseMainWindow
protected Q_SLOTS:
virtual void new_proj();
virtual void open_proj();
virtual bool save_proj();
void newContext(Context *ctx);
void open_base();
void save_config();
private:
QAction *actionLoadBase;
QAction *actionSaveConfig;

7
gui/generic/mainwindow.cc
View File

@ -23,7 +23,8 @@ static void initMainResource() { Q_INIT_RESOURCE(nextpnr); }
NEXTPNR_NAMESPACE_BEGIN
MainWindow::MainWindow(std::unique_ptr<Context> context, ArchArgs args, QWidget *parent) : BaseMainWindow(std::move(context), args, parent)
MainWindow::MainWindow(std::unique_ptr<Context> context, ArchArgs args, QWidget *parent)
: BaseMainWindow(std::move(context), args, parent)
{
initMainResource();
@ -48,8 +49,4 @@ void MainWindow::createMenu() {}
void MainWindow::new_proj() {}
void MainWindow::open_proj() {}
bool MainWindow::save_proj() { return false; }
NEXTPNR_NAMESPACE_END

2
gui/generic/mainwindow.h
View File

@ -37,8 +37,6 @@ class MainWindow : public BaseMainWindow
protected Q_SLOTS:
virtual void new_proj();
virtual void open_proj();
virtual bool save_proj();
void newContext(Context *ctx);
};

114
gui/ice40/mainwindow.cc
View File

@ -24,8 +24,7 @@
#include <QIcon>
#include <QInputDialog>
#include <QLineEdit>
#include <boost/property_tree/json_parser.hpp>
#include <boost/property_tree/ptree.hpp>
#include <fstream>
#include "bitstream.h"
#include "design_utils.h"
#include "jsonparse.h"
@ -166,86 +165,6 @@ void MainWindow::newContext(Context *ctx)
setWindowTitle(title.c_str());
}
void MainWindow::open_proj()
{
QMap<std::string, int> arch;
#ifdef ICE40_HX1K_ONLY
arch.insert("hx1k", ArchArgs::HX1K);
#else
arch.insert("lp384", ArchArgs::LP384);
arch.insert("lp1k", ArchArgs::LP1K);
arch.insert("hx1k", ArchArgs::HX1K);
arch.insert("up5k", ArchArgs::UP5K);
arch.insert("lp8k", ArchArgs::LP8K);
arch.insert("hx8k", ArchArgs::HX8K);
#endif
QString fileName = QFileDialog::getOpenFileName(this, QString("Open Project"), QString(), QString("*.proj"));
if (!fileName.isEmpty()) {
try {
namespace pt = boost::property_tree;
std::string fn = fileName.toStdString();
currentProj = fn;
disableActions();
pt::ptree root;
std::string filename = fileName.toStdString();
pt::read_json(filename, root);
log_info("Loading project %s...\n", filename.c_str());
log_break();
int version = root.get<int>("project.version");
if (version != 1)
log_error("Wrong project format version.\n");
std::string arch_name = root.get<std::string>("project.arch.name");
if (arch_name != "ice40")
log_error("Unsuported project architecture.\n");
std::string arch_type = root.get<std::string>("project.arch.type");
std::string arch_package = root.get<std::string>("project.arch.package");
chipArgs.type = (ArchArgs::ArchArgsTypes)arch.value(arch_type);
chipArgs.package = arch_package;
ctx = std::unique_ptr<Context>(new Context(chipArgs));
Q_EMIT contextChanged(ctx.get());
QFileInfo fi(fileName);
QDir::setCurrent(fi.absoluteDir().absolutePath());
log_info("Setting current dir to %s...\n", fi.absoluteDir().absolutePath().toStdString().c_str());
log_info("Loading project %s...\n", filename.c_str());
log_info("Context changed to %s (%s)\n", arch_type.c_str(), arch_package.c_str());
auto project = root.get_child("project");
std::string json;
std::string pcf;
if (project.count("input")) {
auto input = project.get_child("input");
if (input.count("json"))
json = input.get<std::string>("json");
if (input.count("pcf"))
pcf = input.get<std::string>("pcf");
}
if (!(QFileInfo::exists(json.c_str()) && QFileInfo(json.c_str()).isFile())) {
log_error("Json file does not exist.\n");
}
if (!pcf.empty()) {
if (!(QFileInfo::exists(pcf.c_str()) && QFileInfo(pcf.c_str()).isFile())) {
log_error("PCF file does not exist.\n");
}
}
log_info("Loading json: %s...\n", json.c_str());
load_json(json);
if (!pcf.empty())
load_pcf(json);
} catch (log_execution_error_exception) {
}
}
}
void MainWindow::open_pcf()
{
QString fileName = QFileDialog::getOpenFileName(this, QString("Open PCF"), QString(), QString("*.pcf"));
@ -254,36 +173,6 @@ void MainWindow::open_pcf()
}
}
bool MainWindow::save_proj()
{
if (currentProj.empty()) {
QString fileName = QFileDialog::getSaveFileName(this, QString("Save Project"), QString(), QString("*.proj"));
if (fileName.isEmpty())
return false;
currentProj = fileName.toStdString();
}
if (!currentProj.empty()) {
namespace pt = boost::property_tree;
QFileInfo fi(currentProj.c_str());
QDir dir(fi.absoluteDir().absolutePath());
std::ofstream f(currentProj);
pt::ptree root;
root.put("project.version", 1);
root.put("project.name", fi.baseName().toStdString());
root.put("project.arch.name", ctx->archId().c_str(ctx.get()));
root.put("project.arch.type", ctx->archArgsToId(chipArgs).c_str(ctx.get()));
root.put("project.arch.package", chipArgs.package);
if (!currentJson.empty())
root.put("project.input.json", dir.relativeFilePath(currentJson.c_str()).toStdString());
if (!currentPCF.empty())
root.put("project.input.pcf", dir.relativeFilePath(currentPCF.c_str()).toStdString());
pt::write_json(f, root);
log_info("Project %s saved...\n", fi.baseName().toStdString().c_str());
return true;
}
return false;
}
void MainWindow::save_asc()
{
QString fileName = QFileDialog::getSaveFileName(this, QString("Save ASC"), QString(), QString("*.asc"));
@ -304,5 +193,6 @@ void MainWindow::onDisableActions()
void MainWindow::onJsonLoaded() { actionLoadPCF->setEnabled(true); }
void MainWindow::onRouteFinished() { actionSaveAsc->setEnabled(true); }
void MainWindow::onProjectLoaded() { actionLoadPCF->setEnabled(false); }
NEXTPNR_NAMESPACE_END

7
gui/ice40/mainwindow.h
View File

@ -34,17 +34,17 @@ class MainWindow : public BaseMainWindow
public:
void createMenu();
void load_pcf(std::string filename);
protected:
void load_pcf(std::string filename);
void onDisableActions() override;
void onJsonLoaded() override;
void onRouteFinished() override;
void onProjectLoaded() override;
protected Q_SLOTS:
virtual void new_proj();
virtual void open_proj();
virtual bool save_proj();
void open_pcf();
void save_asc();
@ -55,7 +55,6 @@ class MainWindow : public BaseMainWindow
QAction *actionLoadPCF;
QAction *actionSaveAsc;
std::string currentProj;
std::string currentPCF;
};

99
ice40/arch.cc
View File

@ -27,6 +27,7 @@
#include "placer1.h"
#include "router1.h"
#include "util.h"
NEXTPNR_NAMESPACE_BEGIN
// -----------------------------------------------------------------------
@ -181,7 +182,8 @@ BelId Arch::getBelByLocation(Loc loc) const
BelRange Arch::getBelsByTile(int x, int y) const
{
// In iCE40 chipdb bels at the same tile are consecutive and dense z ordinates are used
// In iCE40 chipdb bels at the same tile are consecutive and dense z ordinates
// are used
BelRange br;
br.b.cursor = Arch::getBelByLocation(Loc(x, y, 0)).index;
@ -535,19 +537,23 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay
auto sink_loc = getBelLocation(sink.cell->bel);
if (driver_loc.y == sink_loc.y)
budget = 0;
else switch (args.type) {
else
switch (args.type) {
#ifndef ICE40_HX1K_ONLY
case ArchArgs::HX8K:
#endif
case ArchArgs::HX1K:
budget = 190; break;
budget = 190;
break;
#ifndef ICE40_HX1K_ONLY
case ArchArgs::LP384:
case ArchArgs::LP1K:
case ArchArgs::LP8K:
budget = 290; break;
budget = 290;
break;
case ArchArgs::UP5K:
budget = 560; break;
budget = 560;
break;
#endif
default:
log_error("Unsupported iCE40 chip type.\n");
@ -770,27 +776,76 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort
return false;
}
IdString Arch::getPortClock(const CellInfo *cell, IdString port) const
// Get the port class, also setting clockPort to associated clock if applicable
TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const
{
if (cell->type == id_ICESTORM_LC && cell->lcInfo.dffEnable) {
if (port != id_LO && port != id_CIN && port != id_COUT)
return id_CLK;
} else if (cell->type == id_ICESTORM_RAM) {
if (port.str(this)[0] == 'R')
return id_RCLK;
if (cell->type == id_ICESTORM_LC) {
if (port == id_CLK)
return TMG_CLOCK_INPUT;
if (port == id_CIN)
return TMG_COMB_INPUT;
if (port == id_COUT || port == id_LO)
return TMG_COMB_OUTPUT;
if (cell->lcInfo.dffEnable) {
clockPort = id_CLK;
if (port == id_O)
return TMG_REGISTER_OUTPUT;
else
return id_WCLK;
return TMG_REGISTER_INPUT;
} else {
if (port == id_O)
return TMG_COMB_OUTPUT;
else
return TMG_COMB_INPUT;
}
return IdString();
}
} else if (cell->type == id_ICESTORM_RAM) {
bool Arch::isClockPort(const CellInfo *cell, IdString port) const
{
if (cell->type == id_ICESTORM_LC && port == id_CLK)
return true;
if (cell->type == id_ICESTORM_RAM && (port == id_RCLK || port == id_WCLK))
return true;
return false;
if (port == id_RCLK || port == id_WCLK)
return TMG_CLOCK_INPUT;
if (port.str(this)[0] == 'R')
clockPort = id_RCLK;
else
clockPort = id_WCLK;
if (cell->ports.at(port).type == PORT_OUT)
return TMG_REGISTER_OUTPUT;
else
return TMG_REGISTER_INPUT;
} else if (cell->type == id_ICESTORM_DSP || cell->type == id_ICESTORM_SPRAM) {
clockPort = id_CLK;
if (port == id_CLK)
return TMG_CLOCK_INPUT;
else if (cell->ports.at(port).type == PORT_OUT)
return TMG_REGISTER_OUTPUT;
else
return TMG_REGISTER_INPUT;
} else if (cell->type == id_SB_IO) {
if (port == id_D_IN_0 || port == id_D_IN_1)
return TMG_STARTPOINT;
if (port == id_D_OUT_0 || port == id_D_OUT_1 || port == id_OUTPUT_ENABLE)
return TMG_ENDPOINT;
return TMG_IGNORE;
} else if (cell->type == id_ICESTORM_PLL) {
if (port == id_PLLOUT_A || port == id_PLLOUT_B)
return TMG_GEN_CLOCK;
return TMG_IGNORE;
} else if (cell->type == id_ICESTORM_LFOSC) {
if (port == id_CLKLF)
return TMG_GEN_CLOCK;
return TMG_IGNORE;
} else if (cell->type == id_ICESTORM_HFOSC) {
if (port == id_CLKHF)
return TMG_GEN_CLOCK;
return TMG_IGNORE;
} else if (cell->type == id_SB_GB) {
if (port == id_GLOBAL_BUFFER_OUTPUT)
return TMG_COMB_OUTPUT;
return TMG_COMB_INPUT;
} else if (cell->type == id_SB_WARMBOOT) {
return TMG_ENDPOINT;
}
log_error("no timing info for port '%s' of cell type '%s'\n", port.c_str(this), cell->type.c_str(this));
}
bool Arch::isGlobalNet(const NetInfo *net) const

21
ice40/arch.h
View File

@ -400,10 +400,10 @@ struct Arch : BaseCtx
mutable std::unordered_map<Loc, int> bel_by_loc;
std::vector<bool> bel_carry;
std::vector<CellInfo*> bel_to_cell;
std::vector<NetInfo*> wire_to_net;
std::vector<NetInfo*> pip_to_net;
std::vector<NetInfo*> switches_locked;
std::vector<CellInfo *> bel_to_cell;
std::vector<NetInfo *> wire_to_net;
std::vector<NetInfo *> pip_to_net;
std::vector<NetInfo *> switches_locked;
ArchArgs args;
Arch(ArchArgs args);
@ -411,6 +411,7 @@ struct Arch : BaseCtx
std::string getChipName() const;
IdString archId() const { return id("ice40"); }
ArchArgs archArgs() const { return args; }
IdString archArgsToId(ArchArgs args) const;
// -------------------------------------------------
@ -782,16 +783,15 @@ struct Arch : BaseCtx
// Get the delay through a cell from one port to another, returning false
// if no path exists
bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
// Get the associated clock to a port, or empty if the port is combinational
IdString getPortClock(const CellInfo *cell, IdString port) const;
// Return true if a port is a clock
bool isClockPort(const CellInfo *cell, IdString port) const;
// Get the port class, also setting clockDomain if applicable
TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockDomain) const;
// Return true if a port is a net
bool isGlobalNet(const NetInfo *net) const;
// -------------------------------------------------
// Perform placement validity checks, returning false on failure (all implemented in arch_place.cc)
// Perform placement validity checks, returning false on failure (all
// implemented in arch_place.cc)
// Whether or not a given cell can be placed at a given Bel
// This is not intended for Bel type checks, but finer-grained constraints
@ -805,7 +805,8 @@ struct Arch : BaseCtx
bool logicCellsCompatible(const std::vector<const CellInfo *> &cells) const;
// -------------------------------------------------
// Assign architecure-specific arguments to nets and cells, which must be called between packing or further
// Assign architecure-specific arguments to nets and cells, which must be
// called between packing or further
// netlist modifications, and validity checks
void assignArchInfo();
void assignCellInfo(CellInfo *cell);

386
ice40/main.cc
View File

@ -2,6 +2,7 @@
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@ -19,222 +20,120 @@
#ifdef MAIN_EXECUTABLE
#ifndef NO_GUI
#include <QApplication>
#include "application.h"
#include "mainwindow.h"
#endif
#ifndef NO_PYTHON
#include "pybindings.h"
#endif
#include <boost/filesystem/convenience.hpp>
#include <boost/program_options.hpp>
#include <boost/property_tree/json_parser.hpp>
#include <boost/property_tree/ptree.hpp>
#include <fstream>
#include <iostream>
#include "bitstream.h"
#include "command.h"
#include "design_utils.h"
#include "jsonparse.h"
#include "log.h"
#include "nextpnr.h"
#include "pcf.h"
#include "timing.h"
#include "version.h"
USING_NEXTPNR_NAMESPACE
void conflicting_options(const boost::program_options::variables_map &vm, const char *opt1, const char *opt2)
class Ice40CommandHandler : public CommandHandler
{
if (vm.count(opt1) && !vm[opt1].defaulted() && vm.count(opt2) && !vm[opt2].defaulted()) {
std::string msg = "Conflicting options '" + std::string(opt1) + "' and '" + std::string(opt1) + "'.";
log_error("%s\n", msg.c_str());
}
}
public:
Ice40CommandHandler(int argc, char **argv);
virtual ~Ice40CommandHandler(){};
std::unique_ptr<Context> createContext() override;
void setupArchContext(Context *ctx) override;
void validate() override;
void customAfterLoad(Context *ctx) override;
void customBitstream(Context *ctx) override;
int main(int argc, char *argv[])
protected:
po::options_description getArchOptions();
};
Ice40CommandHandler::Ice40CommandHandler(int argc, char **argv) : CommandHandler(argc, argv) {}
po::options_description Ice40CommandHandler::getArchOptions()
{
try {
namespace po = boost::program_options;
namespace pt = boost::property_tree;
int rc = 0;
std::string str;
log_files.push_back(stdout);
po::options_description options("Allowed options");
options.add_options()("help,h", "show help");
options.add_options()("verbose,v", "verbose output");
options.add_options()("debug", "debug output");
options.add_options()("force,f", "keep running after errors");
#ifndef NO_GUI
options.add_options()("gui", "start gui");
#endif
options.add_options()("pack-only", "pack design only without placement or routing");
po::positional_options_description pos;
#ifndef NO_PYTHON
options.add_options()("run", po::value<std::vector<std::string>>(), "python file to execute");
pos.add("run", -1);
#endif
options.add_options()("json", po::value<std::string>(), "JSON design file to ingest");
options.add_options()("pcf", po::value<std::string>(), "PCF constraints file to ingest");
options.add_options()("asc", po::value<std::string>(), "asc bitstream file to write");
options.add_options()("read", po::value<std::string>(), "asc bitstream file to read");
options.add_options()("seed", po::value<int>(), "seed value for random number generator");
options.add_options()("slack_redist_iter", po::value<int>(),
"number of iterations between slack redistribution");
options.add_options()("cstrweight", po::value<float>(),
"placer weighting for relative constraint satisfaction");
options.add_options()("version,V", "show version");
options.add_options()("tmfuzz", "run path delay estimate fuzzer");
options.add_options()("test", "check architecture database integrity");
po::options_description specific("Architecture specific options");
#ifdef ICE40_HX1K_ONLY
options.add_options()("hx1k", "set device type to iCE40HX1K");
specific.add_options()("hx1k", "set device type to iCE40HX1K");
#else
options.add_options()("lp384", "set device type to iCE40LP384");
options.add_options()("lp1k", "set device type to iCE40LP1K");
options.add_options()("lp8k", "set device type to iCE40LP8K");
options.add_options()("hx1k", "set device type to iCE40HX1K");
options.add_options()("hx8k", "set device type to iCE40HX8K");
options.add_options()("up5k", "set device type to iCE40UP5K");
specific.add_options()("lp384", "set device type to iCE40LP384");
specific.add_options()("lp1k", "set device type to iCE40LP1K");
specific.add_options()("lp8k", "set device type to iCE40LP8K");
specific.add_options()("hx1k", "set device type to iCE40HX1K");
specific.add_options()("hx8k", "set device type to iCE40HX8K");
specific.add_options()("up5k", "set device type to iCE40UP5K");
#endif
options.add_options()("freq", po::value<double>(), "set target frequency for design in MHz");
options.add_options()("no-tmdriv", "disable timing-driven placement");
options.add_options()("package", po::value<std::string>(), "set device package");
options.add_options()("save", po::value<std::string>(), "project file to write");
options.add_options()("load", po::value<std::string>(), "project file to read");
po::variables_map vm;
try {
po::parsed_options parsed = po::command_line_parser(argc, argv).options(options).positional(pos).run();
po::store(parsed, vm);
po::notify(vm);
} catch (std::exception &e) {
std::cout << e.what() << "\n";
return 1;
}
specific.add_options()("package", po::value<std::string>(), "set device package");
specific.add_options()("pcf", po::value<std::string>(), "PCF constraints file to ingest");
specific.add_options()("asc", po::value<std::string>(), "asc bitstream file to write");
specific.add_options()("read", po::value<std::string>(), "asc bitstream file to read");
specific.add_options()("tmfuzz", "run path delay estimate fuzzer");
return specific;
}
void Ice40CommandHandler::validate()
{
conflicting_options(vm, "read", "json");
#ifndef ICE40_HX1K_ONLY
if ((vm.count("lp384") + vm.count("lp1k") + vm.count("lp8k") + vm.count("hx1k") + vm.count("hx8k") +
vm.count("up5k")) > 1)
log_error("Only one device type can be set\n");
#endif
if (vm.count("help") || argc == 1) {
help:
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git "
"sha1 " GIT_COMMIT_HASH_STR ")\n";
std::cout << "\n";
std::cout << options << "\n";
return argc != 1;
}
void Ice40CommandHandler::customAfterLoad(Context *ctx)
{
if (vm.count("pcf")) {
std::ifstream pcf(vm["pcf"].as<std::string>());
if (!apply_pcf(ctx, pcf))
log_error("Loading PCF failed.\n");
}
if (vm.count("version")) {
std::cout << boost::filesystem::basename(argv[0])
<< " -- Next Generation Place and Route (git "
"sha1 " GIT_COMMIT_HASH_STR ")\n";
return 1;
}
void Ice40CommandHandler::customBitstream(Context *ctx)
{
if (vm.count("asc")) {
std::string filename = vm["asc"].as<std::string>();
std::ofstream f(filename);
write_asc(ctx, f);
}
}
if (vm.count("load")) {
try {
pt::ptree root;
std::string filename = vm["load"].as<std::string>();
pt::read_json(filename, root);
log_info("Loading project %s...\n", filename.c_str());
log_break();
void Ice40CommandHandler::setupArchContext(Context *ctx)
{
if (vm.count("tmfuzz"))
ice40DelayFuzzerMain(ctx);
bool isLoadingGui = vm.count("gui") > 0;
std::string ascOutput;
if (vm.count("asc"))
ascOutput = vm["asc"].as<std::string>();
vm.clear();
int version = root.get<int>("project.version");
if (version != 1)
log_error("Wrong project format version.\n");
std::string arch_name = root.get<std::string>("project.arch.name");
if (arch_name != "ice40")
log_error("Unsuported project architecture.\n");
std::string arch_type = root.get<std::string>("project.arch.type");
vm.insert(std::make_pair(arch_type, po::variable_value()));
std::string arch_package = root.get<std::string>("project.arch.package");
vm.insert(std::make_pair("package", po::variable_value(arch_package, false)));
auto project = root.get_child("project");
if (project.count("input")) {
auto input = project.get_child("input");
if (input.count("json"))
vm.insert(std::make_pair("json", po::variable_value(input.get<std::string>("json"), false)));
if (input.count("pcf"))
vm.insert(std::make_pair("pcf", po::variable_value(input.get<std::string>("pcf"), false)));
}
if (project.count("params")) {
auto params = project.get_child("params");
if (params.count("freq"))
vm.insert(std::make_pair("freq", po::variable_value(params.get<double>("freq"), false)));
if (params.count("seed"))
vm.insert(std::make_pair("seed", po::variable_value(params.get<int>("seed"), false)));
}
if (!ascOutput.empty())
vm.insert(std::make_pair("asc", po::variable_value(ascOutput, false)));
if (isLoadingGui)
vm.insert(std::make_pair("gui", po::variable_value()));
po::notify(vm);
} catch (...) {
log_error("Error loading project file.\n");
}
if (vm.count("read")) {
std::string filename = vm["read"].as<std::string>();
std::ifstream f(filename);
if (!read_asc(ctx, f))
log_error("Loading ASC failed.\n");
}
}
ArchArgs chipArgs;
std::unique_ptr<Context> Ice40CommandHandler::createContext()
{
if (vm.count("lp384")) {
if (chipArgs.type != ArchArgs::NONE)
goto help;
chipArgs.type = ArchArgs::LP384;
chipArgs.package = "qn32";
}
if (vm.count("lp1k")) {
if (chipArgs.type != ArchArgs::NONE)
goto help;
chipArgs.type = ArchArgs::LP1K;
chipArgs.package = "tq144";
}
if (vm.count("lp8k")) {
if (chipArgs.type != ArchArgs::NONE)
goto help;
chipArgs.type = ArchArgs::LP8K;
chipArgs.package = "ct256";
}
if (vm.count("hx1k")) {
if (chipArgs.type != ArchArgs::NONE)
goto help;
chipArgs.type = ArchArgs::HX1K;
chipArgs.package = "tq144";
}
if (vm.count("hx8k")) {
if (chipArgs.type != ArchArgs::NONE)
goto help;
chipArgs.type = ArchArgs::HX8K;
chipArgs.package = "ct256";
}
if (vm.count("up5k")) {
if (chipArgs.type != ArchArgs::NONE)
goto help;
chipArgs.type = ArchArgs::UP5K;
chipArgs.package = "sg48";
}
@ -245,165 +144,20 @@ int main(int argc, char *argv[])
}
#ifdef ICE40_HX1K_ONLY
if (chipArgs.type != ArchArgs::HX1K) {
std::cout << "This version of nextpnr-ice40 is built with "
"HX1K-support "
"only.\n";
return 1;
log_error("This version of nextpnr-ice40 is built with HX1K-support only.\n");
}
#endif
if (vm.count("package"))
chipArgs.package = vm["package"].as<std::string>();
if (vm.count("save")) {
Context ctx(chipArgs);
std::string filename = vm["save"].as<std::string>();
std::ofstream f(filename);
pt::ptree root;
root.put("project.version", 1);
root.put("project.name", boost::filesystem::basename(filename));
root.put("project.arch.name", ctx.archId().c_str(&ctx));
root.put("project.arch.type", ctx.archArgsToId(chipArgs).c_str(&ctx));
root.put("project.arch.package", chipArgs.package);
if (vm.count("json"))
root.put("project.input.json", vm["json"].as<std::string>());
if (vm.count("pcf"))
root.put("project.input.pcf", vm["pcf"].as<std::string>());
if (vm.count("freq"))
root.put("project.params.freq", vm["freq"].as<double>());
if (vm.count("seed"))
root.put("project.params.seed", vm["seed"].as<int>());
pt::write_json(f, root);
return 1;
}
return std::unique_ptr<Context>(new Context(chipArgs));
}
std::unique_ptr<Context> ctx = std::unique_ptr<Context>(new Context(chipArgs));
if (vm.count("verbose")) {
ctx->verbose = true;
}
if (vm.count("debug")) {
ctx->verbose = true;
ctx->debug = true;
}
if (vm.count("force")) {
ctx->force = true;
}
if (vm.count("seed")) {
ctx->rngseed(vm["seed"].as<int>());
}
if (vm.count("slack_redist_iter")) {
ctx->slack_redist_iter = vm["slack_redist_iter"].as<int>();
if (vm.count("freq") && vm["freq"].as<double>() == 0) {
ctx->auto_freq = true;
#ifndef NO_GUI
if (!vm.count("gui"))
#endif
log_warning("Target frequency not specified. Will optimise for max frequency.\n");
}
}
if (vm.count("cstrweight")) {
ctx->placer_constraintWeight = vm["cstrweight"].as<float>();
}
if (vm.count("test"))
ctx->archcheck();
if (vm.count("tmfuzz"))
ice40DelayFuzzerMain(ctx.get());
if (vm.count("freq")) {
auto freq = vm["freq"].as<double>();
if (freq > 0)
ctx->target_freq = freq * 1e6;
}
ctx->timing_driven = true;
if (vm.count("no-tmdriv"))
ctx->timing_driven = false;
if (vm.count("read")) {
std::string filename = vm["read"].as<std::string>();
std::ifstream f(filename);
if (!read_asc(ctx.get(), f))
log_error("Loading ASC failed.\n");
}
#ifndef NO_GUI
if (vm.count("gui")) {
Application a(argc, argv);
MainWindow w(std::move(ctx), chipArgs);
if (vm.count("json")) {
std::string filename = vm["json"].as<std::string>();
std::string pcf = "";
w.load_json(filename);
if (vm.count("pcf")) {
pcf = vm["pcf"].as<std::string>();
w.load_pcf(pcf);
}
}
w.show();
return a.exec();
}
#endif
if (vm.count("json")) {
std::string filename = vm["json"].as<std::string>();
std::ifstream f(filename);
if (!parse_json_file(f, filename, ctx.get()))
log_error("Loading design failed.\n");
if (vm.count("pcf")) {
std::ifstream pcf(vm["pcf"].as<std::string>());
if (!apply_pcf(ctx.get(), pcf))
log_error("Loading PCF failed.\n");
}
if (!ctx->pack() && !ctx->force)
log_error("Packing design failed.\n");
assign_budget(ctx.get());
ctx->check();
print_utilisation(ctx.get());
if (!vm.count("pack-only")) {
if (!ctx->place() && !ctx->force)
log_error("Placing design failed.\n");
ctx->check();
if (!ctx->route() && !ctx->force)
log_error("Routing design failed.\n");
}
}
if (vm.count("asc")) {
std::string filename = vm["asc"].as<std::string>();
std::ofstream f(filename);
write_asc(ctx.get(), f);
}
#ifndef NO_PYTHON
if (vm.count("run")) {
init_python(argv[0], true);
python_export_global("ctx", *ctx.get());
std::vector<std::string> files = vm["run"].as<std::vector<std::string>>();
for (auto filename : files)
execute_python_file(filename.c_str());
deinit_python();
}
#endif
return rc;
} catch (log_execution_error_exception) {
#if defined(_MSC_VER)
_exit(EXIT_FAILURE);
#else
_Exit(EXIT_FAILURE);
#endif
}
int main(int argc, char *argv[])
{
Ice40CommandHandler handler(argc, argv);
return handler.exec();
}
#endif

2
ice40/pcf.cc
View File

@ -31,7 +31,7 @@ bool apply_pcf(Context *ctx, std::istream &in)
{
try {
if (!in)
log_error("failed to open PCF file");
log_error("failed to open PCF file\n");
std::string line;
while (std::getline(in, line)) {
size_t cstart = line.find("#");

71
ice40/project.cc Normal file
View File

@ -0,0 +1,71 @@
/*
* nextpnr -- Next Generation Place and Route
*
* Copyright (C) 2018 Miodrag Milanovic <miodrag@symbioticeda.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include "project.h"
#include <boost/filesystem/convenience.hpp>
#include <fstream>
#include "log.h"
#include "pcf.h"
NEXTPNR_NAMESPACE_BEGIN
void ProjectHandler::saveArch(Context *ctx, pt::ptree &root)
{
root.put("project.arch.package", ctx->archArgs().package);
// if(!pcfFilename.empty())
// root.put("project.input.pcf", pcfFilename);
}
std::unique_ptr<Context> ProjectHandler::createContext(pt::ptree &root)
{
ArchArgs chipArgs;
std::string arch_type = root.get<std::string>("project.arch.type");
if (arch_type == "lp384") {
chipArgs.type = ArchArgs::LP384;
}
if (arch_type == "lp1k") {
chipArgs.type = ArchArgs::LP1K;
}
if (arch_type == "lp8k") {
chipArgs.type = ArchArgs::LP8K;
}
if (arch_type == "hx1k") {
chipArgs.type = ArchArgs::HX1K;
}
if (arch_type == "hx8k") {
chipArgs.type = ArchArgs::HX8K;
}
if (arch_type == "up5k") {
chipArgs.type = ArchArgs::UP5K;
}
chipArgs.package = root.get<std::string>("project.arch.package");
return std::unique_ptr<Context>(new Context(chipArgs));
}
void ProjectHandler::loadArch(Context *ctx, pt::ptree &root, std::string path)
{
auto input = root.get_child("project").get_child("input");
boost::filesystem::path pcf = boost::filesystem::path(path) / input.get<std::string>("pcf");
std::ifstream f(pcf.string());
if (!apply_pcf(ctx, f))
log_error("Loading PCF failed.\n");
}
NEXTPNR_NAMESPACE_END