Added required checks for PLL and fixed messages eol
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@ -717,6 +717,30 @@ static void pack_special(Context *ctx)
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NetInfo *pad_packagepin_net = nullptr;
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NetInfo *pad_packagepin_net = nullptr;
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int pllout_a_used = 0;
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int pllout_b_used = 0;
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for (auto port : ci->ports) {
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PortInfo &pi = port.second;
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if (pi.name == ctx->id("PLLOUTCOREA"))
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pllout_a_used++;
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if (pi.name == ctx->id("PLLOUTCOREB"))
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pllout_b_used++;
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if (pi.name == ctx->id("PLLOUTCORE"))
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pllout_a_used++;
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if (pi.name == ctx->id("PLLOUTGLOBALA"))
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pllout_a_used++;
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if (pi.name == ctx->id("PLLOUTGLOBALB"))
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pllout_b_used++;
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if (pi.name == ctx->id("PLLOUTGLOBAL"))
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pllout_a_used++;
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}
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if (pllout_a_used > 1)
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log_error("PLL '%s' is using multiple ports mapping to PLLOUT_A output of the PLL\n", ci->name.c_str(ctx));
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if (pllout_b_used > 1)
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log_error("PLL '%s' is using multiple ports mapping to PLLOUT_B output of the PLL\n", ci->name.c_str(ctx));
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for (auto port : ci->ports) {
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for (auto port : ci->ports) {
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PortInfo &pi = port.second;
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PortInfo &pi = port.second;
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std::string newname = pi.name.str(ctx);
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std::string newname = pi.name.str(ctx);
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@ -730,16 +754,20 @@ static void pack_special(Context *ctx)
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newname = "PLLOUT_B";
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newname = "PLLOUT_B";
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if (pi.name == ctx->id("PLLOUTCORE"))
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if (pi.name == ctx->id("PLLOUTCORE"))
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newname = "PLLOUT_A";
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newname = "PLLOUT_A";
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if (pi.name == ctx->id("PLLOUTGLOBALA"))
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if (pi.name == ctx->id("PLLOUTGLOBALA"))
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newname = "PLLOUT_A";
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newname = "PLLOUT_A";
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if (pi.name == ctx->id("PLLOUTGLOBALB"))
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if (pi.name == ctx->id("PLLOUTGLOBALB"))
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newname = "PLLOUT_B";
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newname = "PLLOUT_B";
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if (pi.name == ctx->id("PLLOUTGLOBAL"))
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if (pi.name == ctx->id("PLLOUTGLOBAL"))
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newname = "PLLOUT_A";
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newname = "PLLOUT_A";
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if (pi.name == ctx->id("PLLOUTGLOBALA") || pi.name == ctx->id("PLLOUTGLOBALB") || pi.name == ctx->id("PLLOUTGLOBAL"))
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log_warning("PLL '%s' is using port %s but implementation does not actually "
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"use the global clock output of the PLL\n", ci->name.c_str(ctx), pi.name.str(ctx).c_str());
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if (pi.name == ctx->id("PACKAGEPIN")) {
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if (pi.name == ctx->id("PACKAGEPIN")) {
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if (!is_pad) {
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if (!is_pad) {
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log_error("PLL '%s' has a PACKAGEPIN but is not a PAD PLL", ci->name.c_str(ctx));
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log_error("PLL '%s' has a PACKAGEPIN but is not a PAD PLL\n", ci->name.c_str(ctx));
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} else {
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} else {
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// We drop this port and instead place the PLL adequately below.
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// We drop this port and instead place the PLL adequately below.
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pad_packagepin_net = port.second.net;
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pad_packagepin_net = port.second.net;
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@ -749,7 +777,7 @@ static void pack_special(Context *ctx)
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}
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}
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if (pi.name == ctx->id("REFERENCECLK")) {
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if (pi.name == ctx->id("REFERENCECLK")) {
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if (!is_core)
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if (!is_core)
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log_error("PLL '%s' has a REFERENCECLK but is not a CORE PLL", ci->name.c_str(ctx));
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log_error("PLL '%s' has a REFERENCECLK but is not a CORE PLL\n", ci->name.c_str(ctx));
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}
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}
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if (packed->ports.count(ctx->id(newname)) == 0) {
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if (packed->ports.count(ctx->id(newname)) == 0) {
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