caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Also include TMG_GEN_CLOCK as a timing startpoint

Browse Source
This commit is contained in:
Eddie Hung 2018-08-08 07:49:07 -07:00
parent e6eb203868
commit fca01f5447
1 changed files with 2 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
common/timing.cc
View File

@ -95,14 +95,13 @@ struct Timing
topographical_order.emplace_back(o->net);
net_data.emplace(o->net, TimingData{clkToQ.maxDelay()});
} else {
// Also add I/O cells too
// TODO: how to process ignore here
if (portClass == TMG_STARTPOINT || portClass == TMG_IGNORE) {
if (portClass == TMG_STARTPOINT || portClass == TMG_GEN_CLOCK || portClass == TMG_IGNORE) {
topographical_order.emplace_back(o->net);
net_data.emplace(o->net, TimingData{});
}
// Otherwise, for all driven input ports on this cell,
// if a timing arch exists between the input and
// if a timing arc exists between the input and
// the current output port, increment fanin counter
for (auto i : input_ports) {
DelayInfo comb_delay;