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Also include TMG_GEN_CLOCK as a timing startpoint

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This commit is contained in:
Eddie Hung 2018-08-08 07:49:07 -07:00
parent e6eb203868
commit fca01f5447
1 changed files with 2 additions and 3 deletions
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5
common/timing.cc
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@ -95,14 +95,13 @@ struct Timing
topographical_order.emplace_back(o->net); topographical_order.emplace_back(o->net);
net_data.emplace(o->net, TimingData{clkToQ.maxDelay()}); net_data.emplace(o->net, TimingData{clkToQ.maxDelay()});
} else { } else {
// Also add I/O cells too
// TODO: how to process ignore here // TODO: how to process ignore here
if (portClass == TMG_STARTPOINT || portClass == TMG_IGNORE) { if (portClass == TMG_STARTPOINT || portClass == TMG_GEN_CLOCK || portClass == TMG_IGNORE) {
topographical_order.emplace_back(o->net); topographical_order.emplace_back(o->net);
net_data.emplace(o->net, TimingData{}); net_data.emplace(o->net, TimingData{});
} }
// Otherwise, for all driven input ports on this cell, // Otherwise, for all driven input ports on this cell,
// if a timing arch exists between the input and // if a timing arc exists between the input and
// the current output port, increment fanin counter // the current output port, increment fanin counter
for (auto i : input_ports) { for (auto i : input_ports) {
DelayInfo comb_delay; DelayInfo comb_delay;