Commit Graph

55 Commits

Author SHA1 Message Date
YRabbit
6eeac1cabf gowin: Himbaechel. Use pin functions info
Use information about pin functions in the clock router.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-08-31 08:28:09 +02:00
YRabbit
b2ec06dfe8 gowin: Himbaechel. Implement the GSR primitive
On GW2A chips, the global set/reset is in its own cell.
Also corrections to ALU generation.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-08-31 08:28:09 +02:00
YRabbit
6cac19c055 gowin: Himbaechel. Add constraint file processing.
- minor fixes for pinout saving;
- CST parser taken from generic-based apicula;
- $nextpnr IOB detachment is copied here because it is necessary to copy
  attributes from deleted bels.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-08-31 08:28:09 +02:00
YRabbit
c4b3268e90 gowin: Himbaechel. Add the LUTRAM
- RAM16SDP1, RAM16SDP2 and RAM16SDP4 support;
    - Reading in these primitives is asynchronous, but we have taken
      measures so that DFF Bels remain unoccupied and they can be used
      to implement synchronous reading.
    - misc fixes.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-08-31 08:28:09 +02:00
YRabbit
c9b23a01db gowin: Himbaechel. Add ALU.
- Added support for ALU running in "2" ADDSUB mode, the mode that yosys generates for gowin;
- Supports specifying an arbitrary input carry as well as passing the output carry to logic;
- A small restructuring of the source files.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-08-31 08:28:09 +02:00