gatecat
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9b51c6e337
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clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
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2024-09-30 14:51:33 +02:00 |
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Lofty
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119b47acf3
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mistral: add 8x40-bit M10K addressing mode
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2023-05-31 00:49:27 +01:00 |
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gatecat
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1d3e5151ba
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clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
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2023-05-19 09:00:31 +02:00 |
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Lofty
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7a827b1c78
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mistral: improve timing calculation
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2023-05-17 20:38:03 +02:00 |
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gatecat
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5e9236f9d4
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mistral: Updated CLK mux select name
Signed-off-by: gatecat <gatecat@ds0.me>
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2022-03-18 18:54:40 +00:00 |
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gatecat
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d8244bb62d
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mistral: Update to latest upstream
Signed-off-by: gatecat <gatecat@ds0.me>
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2022-03-17 19:19:38 +00:00 |
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Lofty
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883f274802
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mistral: M10K initialisation support
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2022-03-12 17:08:20 +00:00 |
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Lofty
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3e688a3ac9
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mistral: fixes and debug info
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2022-03-09 17:13:54 +00:00 |
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Lofty
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9be65cd67c
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mistral: some more M10K fixes
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2022-03-09 17:13:54 +00:00 |
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Lofty
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78474a5dec
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mistral: preliminary bitstream info
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2022-03-09 17:13:54 +00:00 |
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gatecat
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6a32aca4ac
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refactor: New member functions to replace design_utils
Signed-off-by: gatecat <gatecat@ds0.me>
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2022-02-18 11:13:18 +00:00 |
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gatecat
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84399caebe
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run clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
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2022-02-03 15:28:46 +00:00 |
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Olivier Galibert
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27d38de612
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Mistral: Use log_error, remove leftover debugging printf.
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2022-01-19 08:42:29 +01:00 |
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Olivier Galibert
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91a0eb9367
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Mistral: fix gpio OE, add hmc bypass support
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2022-01-18 22:37:35 +01:00 |
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Olivier Galibert
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b5fc788153
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Sync with the current state of mistral
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2022-01-18 15:12:45 +01:00 |
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gatecat
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2c43ac992f
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mistral: Update to latest enum name
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-12-22 13:21:18 +00:00 |
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gatecat
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f5f7ef6864
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mistral: Adding support for MLABs as memory
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-10-05 12:40:47 +01:00 |
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gatecat
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0e83db47a0
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clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-08-26 14:58:43 +01:00 |
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Lofty
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b88e86f366
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mistral: Use MLABs as if they're LABs (for now)
Signed-off-by: Lofty <dan.ravensloft@gmail.com>
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2021-08-17 16:02:49 +01:00 |
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gatecat
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579b98c596
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Use hashlib for core netlist structures
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-06-02 14:27:56 +01:00 |
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gatecat
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eb2265a2bf
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mistral: Make RBF compression optional
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-30 15:50:12 +01:00 |
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gatecat
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9d7f90dd89
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mistral: Add MISTRAL_CLKBUF cell type
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 21:28:48 +01:00 |
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gatecat
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9221acc9e2
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mistral: Fix ENA and ACLR bitstream generation
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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87ebada258
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mistral: Fix EF_SEL and BTO_DIS
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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8bc9732d49
|
mistral: PKREG bits appear to be mirrored within a half?
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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b29fa1d24c
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mistral: FF&CLKBUF fixes, part 1
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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66b3a192f8
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mistral: First pass at FF and CLKBUF bitgen
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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09a867310b
|
mistral: Carry fixes
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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3d1bb4f1b2
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mistral: Carry debugging
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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2f2fde7e6c
|
mistral: Write arith mode to bitstream (not yet functional)
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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bacba274a2
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mistral: Write LUT inits
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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d1f635242d
|
mistral: Add some IO configuration
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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dea4c6f53f
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mistral: Setting some more boilerplate bits
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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27eb3be7da
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mistral: Add stub RBF generation
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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