Lofty
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883f274802
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mistral: M10K initialisation support
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2022-03-12 17:08:20 +00:00 |
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Lofty
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3e688a3ac9
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mistral: fixes and debug info
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2022-03-09 17:13:54 +00:00 |
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Lofty
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33e031a284
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mistral: M10K cell function
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2022-03-09 17:13:54 +00:00 |
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Lofty
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af6735bdf4
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mistral: add M10K bel
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2022-03-09 17:13:54 +00:00 |
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gatecat
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76683a1e3c
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refactor: Use constids instead of id("..")
Signed-off-by: gatecat <gatecat@ds0.me>
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2022-02-16 17:09:54 +00:00 |
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Olivier Galibert
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f88c119461
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mistral: Add internal oscillator support
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2021-10-17 14:26:24 +02:00 |
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Olivier Galibert
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bfd61411e7
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cyclonev_hps_interface_mpu_general_purpose: Use a id_ identifier
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2021-10-15 12:05:24 +02:00 |
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gatecat
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f5f7ef6864
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mistral: Adding support for MLABs as memory
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-10-05 12:40:47 +01:00 |
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gatecat
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fe31fba623
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mistral: Add bel pins for MLAB write port
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-10-03 15:18:41 +01:00 |
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gatecat
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9d7f90dd89
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mistral: Add MISTRAL_CLKBUF cell type
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 21:28:48 +01:00 |
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gatecat
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3bb94192d5
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mistral: Tidying up
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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d39e67da7e
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mistral: First pass at carry packing
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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18e05ec852
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mistral: Fix constant trimming
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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ad5e5f80ca
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mistral: Rename clock buffer primitive
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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386b5b901c
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mistral: Implement some misc. things
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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96f16c8635
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mistral: Add a basic QSF parser
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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595b354184
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mistral: Add some packing logic based on nexus
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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gatecat
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879ac39e53
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mistral: Renamed arch from cyclonev
Signed-off-by: gatecat <gatecat@ds0.me>
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2021-05-15 14:54:33 +01:00 |
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