gatecat
|
977180524a
|
nexus: More DPHY clock ports that require general routing hop
Signed-off-by: gatecat <gatecat@ds0.me>
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2023-08-23 11:42:39 +02:00 |
|
David Lattimore
|
1602774d27
|
nexus: Transform registered output parameters
Dual ported:
OUTREG_A -> OUT_REGMODE_A
OUTREG_B -> OUT_REGMODE_B
Pseudo dual ported:
OUTREG -> OUT_REGMODE_B
Single ported:
OUTREG -> OUT_REGMODE_A
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2022-10-05 14:40:49 +11:00 |
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gatecat
|
f7354d092d
|
nexus: Add timing data for LRAM
Signed-off-by: gatecat <gatecat@ds0.me>
|
2022-08-10 15:47:22 +01:00 |
|
Maciej Kurc
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43861c0ee2
|
nexus: Added support for the DCS Bel
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
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2022-03-16 09:20:15 +01:00 |
|
gatecat
|
76683a1e3c
|
refactor: Use constids instead of id("..")
Signed-off-by: gatecat <gatecat@ds0.me>
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2022-02-16 17:09:54 +00:00 |
|
Karol Gugala
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500fa6f442
|
nexus: handle SLEWRATE in pdc
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2021-12-20 15:09:03 +01:00 |
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gatecat
|
f395ad3e27
|
nexus: Support for split Vcc routing
Signed-off-by: gatecat <gatecat@ds0.me>
|
2021-09-22 15:00:59 +01:00 |
|
gatecat
|
5686fdcf1c
|
nexus: Basic packer and FASM support for I/ODDR
Signed-off-by: gatecat <gatecat@ds0.me>
|
2021-07-28 13:27:02 +01:00 |
|
gatecat
|
d0acb1b239
|
nexus: Add IOLOGIC pins data
Signed-off-by: gatecat <gatecat@ds0.me>
|
2021-07-28 12:42:58 +01:00 |
|
gatecat
|
1595c07260
|
router2: Add heatmap by routing resource type
Signed-off-by: gatecat <gatecat@ds0.me>
|
2021-05-20 14:54:23 +01:00 |
|
gatecat
|
08c7f97b1e
|
nexus: Support for hard DPHY
Signed-off-by: gatecat <gatecat@ds0.me>
|
2021-03-08 15:59:18 +00:00 |
|
gatecat
|
91064c7ec8
|
nexus: Add pin definitions for DPHY
Signed-off-by: gatecat <gatecat@ds0.me>
|
2021-03-08 15:59:18 +00:00 |
|
David Shah
|
2c6caf4a9a
|
nexus: Add MULTADDSUB9X9WIDE support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-12-08 15:49:48 +00:00 |
|
David Shah
|
270efdca85
|
nexus: Add basic LRAM support (no init)
Signed-off-by: David Shah <dave@ds0.me>
|
2020-12-02 17:07:34 +00:00 |
|
David Shah
|
86e6a2225c
|
nexus: Add PLL support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-12-02 15:01:46 +00:00 |
|
David Shah
|
f795527454
|
nexus: Add MULTADDSUB18X18 support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
edd719c5c5
|
nexus: ACC54 definitions
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
91d746cfc8
|
nexus: Add DSP pre-adder support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
d8e748bc58
|
nexus: Refactor DSP macro splitting to make it more generic
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
30c65931b2
|
nexus: Add support for clocked MULT9X9s
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
9203181625
|
nexus: Support for unclocked 9x9 multiplies
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
d9a19897c4
|
nexus: More DSP primitive config
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
094bf419d4
|
nexus: Miscellaneous DSP infrastructure
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
9b89a82573
|
nexus: Add LUTRAM and WIDEFN9 timing support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
8c1f25cf31
|
timing: Add a few more cell types
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
3d41656168
|
nexus: Default EBR DWS pins to 1
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
e6c2887773
|
nexus: Basic support for carries
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:28 +00:00 |
|
David Shah
|
e8e6316f88
|
nexus: EBR fixes
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
4503608c7c
|
nexus: Add packing rules for BRAM
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
cbf99d5e53
|
nexus: LUTRAM support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
40441d83cd
|
nexus: Promote and place global buffers
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
c80144b7f0
|
nexus: Generate FASM files that can be used standalone
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
df3866a800
|
nexus: Add IO packing
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
e203bd3a2b
|
nexus: Skeleton of PDC parser
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
0a1afe1f79
|
nexus: Infrastructure for constant/inv handling
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
46536773f4
|
nexus: Rework how constant pins work
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
e54aa836a4
|
nexus: Updates
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
a280f893d4
|
nexus: Add oscillator support
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
44f98c545b
|
nexus: Add global networks
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
cef0e1db8f
|
nexus: Minimal IO FASM output
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
689922bc21
|
nexus: Add FASM export for comb logic and FFs
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
b00595f3da
|
nexus: Add constids
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|
David Shah
|
54e0ef9cf7
|
Adding archdefs and bba PODs
Signed-off-by: David Shah <dave@ds0.me>
|
2020-11-30 08:45:27 +00:00 |
|