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Author SHA1 Message Date
YRabbit
fdc2769259 gowin: add a common mechanism for placing ports 
If the port is in a different cell than the primitive, then use the alias mechanism.
Considerably compact code for OSC as an example.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-04-20 08:35:50 +02:00
YRabbit
71192dc7a3 gowin: Remove inherited code for ODDR(c) 
Implement ODDR(c) as part of IOLOGIC and remove all old code associated
with those primitives.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-04-14 09:23:00 +02:00
gatecat
b0a78de78f fabulous: Support for configurable LUT size 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-04-13 13:29:52 +02:00
YRabbit
62b8baa959 gowin: Fix style 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-04-12 14:35:17 +02:00
YRabbit
fddacb3dc1 gowin: implement IDES16 and OSER16 primitives 
These are very cumbersome primitives that take up two cells and
consequently 4 IOLOGIC bels.
The primitives are implemented for the chips that contain them and are
supported by apicula GW1NSR-4C, GW1NR-9 and GW1NR-9C.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-04-12 14:35:17 +02:00
gatecat
7557d33dc6 ecp5: Fix invalid accesses during certain IO packing cases 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-04-12 06:56:59 +02:00
gatecat
6455b5dd26 viaduct: Add support for GUIs 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-04-11 19:11:54 +02:00
YRabbit
9bcefe46a8 gowin: Add implementation of IDDR and IDDRC primitives 
Simple deserialization primitives are implemented for all supported boards.

Compatible with older apicula bases.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-04-06 08:41:54 +02:00
gatecat
23f2877dde fabulous: Fix bel names for pass bels in v2 format 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-04-05 15:45:18 +02:00
YRabbit
20b7f760d9 gowin: Add support for IDES primitives 
* placement of IDES4, IVIDEO, IDES8 and IDES10 primitives is supported;
* primitives are implemented for the GW1N-1, GW1NZ-1, GW1NSR-4C,
  GW1NR-9, GW1NR-9C chips;
* tricks required for IOLOGIC to work on one side of the -9 and -9C
  chips are taken into account;

Compatible with old apicula bases.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-04-04 10:00:08 +02:00
YRabbit
b36e8a3013 gowin: bugfix 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-03-23 12:37:53 +01:00
YRabbit
c52906e8bc gowin: Rename questionable ports 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-03-23 12:37:53 +01:00
YRabbit
38eb1f05ff gowin: Change the way errors are processed 
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-03-23 12:37:53 +01:00
YRabbit
95ace0fade gowin: Add support for OSER primitives 
* placement of OSER4, OVIDEO, OSER8 and SER10 primitives is supported;
* primitives are implemented for the GW1N-1, GW1NZ-1, GW1NSR-4C,
  GW1NR-9, GW1NR-9C chips;
* the initial support for special HCLK clock wires is implemented to the
  extent necessary for OSER primitives to function;
* output to both regular IO and TLVDS_OBUF is supported;
* tricks required for IOLOGIC to work on one side of the -9 and -9C
  chips are taken into account;
* various edits, such as using idf() instead of the local buffer.

Compatible with old apicula bases.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2023-03-23 12:37:53 +01:00
gatecat
b3c33bd0ab ice40: Fix BRAM NegClk bitstream logic 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-20 18:54:57 +01:00
Miodrag Milanovic
d7e450b7b6 Update prjtrellis 2023-03-20 09:53:35 +01:00
Miodrag Milanovic
35eeaa7cc5 Add ramaining PIO tiles 2023-03-20 09:53:35 +01:00
Miodrag Milanovic
3f4c8d15d9 Use unified io location data 2023-03-20 09:53:35 +01:00
Miodrag Milanovic
0ce72e1a31 Use TRELLIS primitives 2023-03-20 09:53:35 +01:00
Miodrag Milanovic
ad5f6fccaa Use RelSlice, make more in line with ecp5 arch 2023-03-20 09:53:35 +01:00
gatecat
e4fcd3740d cmake: Make HeAP placer always-enabled 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-17 10:38:11 +01:00
gatecat
4111cc25d6 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-17 09:31:38 +01:00
Miodrag Milanovic
656bfdb819 Update prjtrellis to latest 2023-03-16 15:19:48 +01:00
Miodrag Milanovic
d337ab93e6 Update to latest prjtrellis 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
11a90aff83 Fix out of tree builds and place h in generated 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
f008d7c4d8 Let top tiles be on top 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
6eb5f2a77e Enable wires and add dummy wire type for now 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
1f115ddd32 Basic GUI part selection 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
26798038fe Fix examples 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
7ad9914e51 Extend chipdb with metadata 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
d5b5f7e4b2 add new field handling in chip config format 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
4396a646a7 Add simple BEL graphics 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
26f23e3121 Make small GUI changes 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
18ad718e53 Expand list of possible devices 2023-03-16 13:37:23 +01:00
Miodrag Milanovic
12911a7470 Remove anoying warning from cmake 2023-03-16 13:37:23 +01:00
gatecat
ff14547601 ecp5: Update GUI rendering to match arch changes 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-16 13:13:57 +01:00
gatecat
39b6584274 clangformat 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-16 11:27:08 +01:00
gatecat
132a98a91d router1: Add error when dest port has no wire 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-03-06 14:15:48 +01:00
gatecat
2f509734df fabulous: Misc improvements 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-02-28 21:39:25 +01:00
gatecat
cdd7bb676f fabulous: Support for complex flops in PnR 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-02-28 21:39:25 +01:00
gatecat
1dcc2f777d ice40: Add python binding for write_bitstream 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-02-28 18:46:35 +01:00
gatecat
5d0aa77861 fabulous: Add timing model for carries 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-02-27 08:42:56 +01:00
gatecat
26fcf349ad fabulous: LUT permutation support 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-02-27 08:42:56 +01:00
gatecat
14050f991b fabulous: Global constant wires scheme 
Signed-off-by: gatecat <gatecat@ds0.me>
 2023-02-23 10:05:55 +01:00
Catherine
1809e18c7b CMake: detect platform support for threads 2023-02-23 10:05:44 +01:00
Catherine
ebbaf8c08d common: disable parallel refinement only without threads. 
Previously it was always disabled on WebAssembly builds.
 2023-02-23 09:45:19 +01:00
Catherine
8f0731edc9 common: update deprecated use of boost::filesystem::basename. 2023-02-23 09:44:46 +01:00
Catherine
088c822e28 CMake: check if warning flag is supported before use. 
Clang 11 is failing on -Wno-format-truncation.
 2023-02-23 09:44:29 +01:00
Catherine
e94479ccd5
Merge pull request #1108 from whitequark/fix-includes 
common: add missing includes for libc++
 2023-02-23 04:13:10 +00:00
Catherine
4b4f4a7da1 common: add missing includes for libc++. 2023-02-23 02:32:19 +00:00