Commit Graph

51 Commits

Author SHA1 Message Date
gatecat
efb58711b0 ecp5: Split the SLICE bel into separate LUT/FF/RAMW bels 2022-04-07 18:02:36 +01:00
gatecat
f36188f2e1 ecp5: LUT permutation support
Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-13 20:22:06 +00:00
Matt Johnston
90b0e90bbe ecp5: Reduce some chipdb fields sizes
This reduces the final binary size by ~7 MB for 85k
2021-12-13 11:48:50 +08:00
D. Shah
3fc5455ec5 ecp5: Switch from RelPtr to RelSlice
This replaces RelPtrs and a separate length field with a Rust-style
slice containing both a pointer and a length; with bounds checking
always enforced.

Thus iterating over these structures is both cleaner and safer.

Signed-off-by: D. Shah <dave@ds0.me>
2021-01-27 19:39:19 +00:00
whitequark
89e0cc8078 Simplify and improve chipdb embedding/loading. 2020-06-26 08:36:07 +00:00
whitequark
1dc1164dce CMake: rewrite chipdb handling from ground up. 2020-06-25 14:03:37 +00:00
David Shah
7c81d4e630 ecp5: Add SPICB0 IO support
Signed-off-by: David Shah <dave@ds0.me>
2020-01-20 20:30:14 +00:00
Miodrag Milanovic
796d648995 Merge remote-tracking branch 'origin/master' into mmicko/ecp5_gui 2019-12-28 13:54:06 +01:00
Miodrag Milanovic
b271e59472 Add global wires 2019-12-15 17:20:48 +01:00
Miodrag Milanovic
ebbfb6375d more new wires added 2019-12-14 09:18:24 +01:00
Miodrag Milanovic
6d005f38b5 add more 2019-12-13 19:44:49 +01:00
Miodrag Milanovic
c0585e98eb added siologic 2019-12-13 14:32:27 +01:00
Miodrag Milanovic
16f6aaa68c Add many new wires 2019-12-13 14:01:28 +01:00
David Shah
bac8335222 ecp5: Add constids for new timing cell types
Signed-off-by: David Shah <dave@ds0.me>
2019-10-26 20:50:50 +01:00
David Shah
475fcd4425 ecp5: Add an error for out-of-sync constids and bba
Signed-off-by: David Shah <dave@ds0.me>
2019-10-26 20:38:28 +01:00
Miodrag Milanovic
d1feb2aa2d display horizontal wires, add some globals to list 2019-10-23 18:17:08 +02:00
Miodrag Milanovic
e69bb4c077 Simplify layout of elements 2019-10-20 09:41:48 +02:00
Miodrag Milanovic
8c79044d43 more wires between switchboxes 2019-10-20 09:41:48 +02:00
Miodrag Milanovic
28d0313ccc Less types needed 2019-10-20 09:41:48 +02:00
Miodrag Milanovic
f7a6d4dc06 Start adding visible wires 2019-10-20 09:41:48 +02:00
Miodrag Milanovic
eafc0e4e9e Added type to wire 2019-10-20 09:41:48 +02:00
David Shah
55b0b60d9d ecp5: Router performance improvements
Signed-off-by: David Shah <dave@ds0.me>
2019-02-25 11:49:25 +00:00
David Shah
5cfc7674c1 ecp5: Add DQS groupings to database
Signed-off-by: David Shah <dave@ds0.me>
2019-02-24 10:28:25 +01:00
David Shah
94dc54f4fa ecp5: Add 10% safety margin to pip delays
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:35:01 +00:00
David Shah
13244e513b ecp5: Fix db import, improve timing data debugging
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
cc746d888b ecp5: Fix timing pip classes
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
703ff2818f ecp5: Fix timing data import
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
18813f2056 ecp5: Adding real timing data to database
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
cc9fb1497d ecp5: Groundwork for DCU support
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
24414614d2 ecp5: Import SPINE data to database
Signed-off-by: David Shah <davey1576@gmail.com>
2018-09-29 16:09:21 +01:00
David Shah
cdc9dc545e ecp5: Add crude approximation of Pip delays
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-19 14:29:16 +01:00
David Shah
a3ae3f9791 ecp5: Update to use const IdStrings in place of PortPin/BelType
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-08 19:08:43 +02:00
David Shah
cc32290c1f ecp5: Write tiletype names in correct order
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-02 16:15:46 +02:00
David Shah
bcdcba66a6 ecp5: Add tilemap to chip database
Signed-off-by: David Shah <davey1576@gmail.com>
2018-08-01 15:23:27 +02:00
David Shah
32559638d3 ecp5: Fix chipdb builder
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-27 18:48:02 +02:00
David Shah
8fffb0add9 ecp5: Add global network info to database
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-25 19:44:50 +02:00
David Shah
4b6d78ebe7 ecp5: Update trellis_import to use new bbasm
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-25 14:15:39 +02:00
David Shah
d0ed23d673 ecp5: Remove obsolete db entries, add Bel z-position
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-23 10:32:42 +02:00
David Shah
987fdc1b29 ecp5: Adding new Bel pin API
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-22 17:07:38 +02:00
David Shah
5393841c66 ecp5: Adding PIO data to chipdb
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-18 15:34:22 +02:00
David Shah
044db02012 ecp5: Major improvements to Trellis importer
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-17 12:21:24 +02:00
David Shah
9e06954edb ecp5: Improving SLICE bel
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-12 10:09:56 +02:00
Clifford Wolf
6ffae27aa1 Deterministic chipdb blobs
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-07-11 18:36:15 +02:00
David Shah
9a2e8caf1c ecp5: Buttons working
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-11 10:42:09 +02:00
David Shah
54f06fdf72 ecp5: Adding tiletypes to database
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-11 10:42:09 +02:00
David Shah
417913fd85 ecp5: Architecture fixes
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-11 10:42:09 +02:00
David Shah
bb683d71d6 ecp5: Add 25k database
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-11 10:41:36 +02:00
David Shah
6f90c3df61 ecp5: Adding complete binary blob writer to Trellis importer
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-11 10:41:36 +02:00
David Shah
ee45f57909 ecp5: Starting to add BBA to importer
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-11 10:41:36 +02:00
David Shah
12b0f7f162 ecp5: Adding Bels to import script
Signed-off-by: David Shah <davey1576@gmail.com>
2018-07-11 10:41:36 +02:00