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07e265868b
Commit Graph

142 Commits

Author SHA1 Message Date
David Shah
07e265868b archapi: Add getDelayFromNS to improve timing algorithm portability 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
David Shah
122771cac3 timing: iCE40 Arch API changes for clocking info 
Signed-off-by: David Shah <dave@ds0.me>
 2018-11-12 14:03:58 +00:00
Miodrag Milanovic
4c0db11608 fix grid dimensions for ice40 2018-10-27 12:02:01 +02:00
David Shah
ea03aafc26 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-09-30 15:13:18 +01:00
Clifford Wolf
7cdafb8121 Add iCE40 gfx for span-4 wires between IO tiles 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 16:31:02 +02:00
Clifford Wolf
26be6f9761
Merge pull request #47 from YosysHQ/settings_propagate 
Use settings for placer1 and router1
 2018-08-18 19:25:19 +02:00
Clifford Wolf
456a83430a Improve iCE40 gfx for IO tiles and RAM tiles 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-18 16:20:33 +02:00
Clifford Wolf
5500cf3aff Add ice40 wire attributes (grid position, segment list) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-18 14:14:27 +02:00
Clifford Wolf
428f0b9eba Add Arch attrs API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-14 17:16:14 +02:00
Eddie Hung
fc0496ec71 Merge remote-tracking branch 'origin/master' into placer_speedup 2018-08-10 19:51:35 -07:00
Eddie Hung
a41500a015 Rework Arch::logicCellsCompatible() to take pointer + size, allowing use of std::array 2018-08-10 19:50:27 -07:00
Miodrag Milanovic
93a0d24560 Use settings for placer1 and router1 2018-08-09 18:39:10 +02:00
Clifford Wolf
5ddde5c49f Add pip locations 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-09 10:39:53 +02:00
Clifford Wolf
f6189e4677 Merge branch 'master' of github.com:YosysHQ/nextpnr into constids 2018-08-08 19:35:13 +02:00
David Shah
cd4e761bb7
Merge pull request #44 from YosysHQ/improve_timing_spec 
Speed up budget allocator using topographical ordering and update cell timing API
 2018-08-08 19:23:47 +02:00
Clifford Wolf
f875a37467 Get rid of old iCE40 id_ Arch members 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-08 17:17:16 +02:00
David Shah
433ad6462e Arch API: Removing Arch::isIOCell 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 17:06:59 +02:00
Clifford Wolf
e03ae50e21 Get rid of PortPin and BelType (ice40, generic, docs) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-08 17:01:18 +02:00
David Shah
bf42e525cb Arch API: New specification for timing port classes 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-08 14:37:59 +02:00
Miodrag Milanovic
5df90bc5a5 Merge remote-tracking branch 'origin/master' into common_main 
# Conflicts:
#	ecp5/main.cc
#	ice40/main.cc
 2018-08-08 10:48:05 +02:00
Eddie Hung
f44a5fb904 clangformat 2018-08-06 17:35:23 -07:00
Eddie Hung
21cd1d7dd6 Add new Arch::isIOCell() API function 2018-08-06 12:11:47 -07:00
Miodrag Milanovic
fffaaa613f Added project loader 2018-08-06 19:32:17 +02:00
Eddie Hung
823ceaacbf Change getBudgetOverride() signature to return bool and modify budget in place 2018-08-06 07:56:28 -07:00
Eddie Hung
7aab4925b4 Change getBudgetOverride() signature to return bool and modify budget in place 2018-08-05 22:31:59 -07:00
Clifford Wolf
5e53075990 API change: Use CellInfo* and NetInfo* as cell/net handles (common, ice40) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-05 15:25:42 +02:00
Clifford Wolf
287fe7e894 clangformat 2018-08-05 14:18:34 +02:00
Clifford Wolf
f6b3333a7d Add new iCE40 delay estimator and delay predictor 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 19:50:49 +02:00
Clifford Wolf
bd36cc1275 Refactor ice40 timing fuzzer used to create delay estimates 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-04 13:41:42 +02:00
Clifford Wolf
96291f17aa Merge branch 'master' of github.com:YosysHQ/nextpnr into lutperm 2018-08-04 10:32:07 +02:00
David Shah
082b8bf272 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-04 08:18:04 +02:00
Clifford Wolf
8d372b86f3 Proper ice40 wire types 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-03 21:11:12 +02:00
David Shah
b937e6defe Add constraint weight as a command line option 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-03 18:31:54 +02:00
Clifford Wolf
2a1d54389f Add iCE40 pseudo-pips for lut permutation 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-03 17:37:59 +02:00
Clifford Wolf
e673d9d2db
Merge pull request #22 from YosysHQ/routethru 
Add iCE40 LUT route-through pips
 2018-08-03 12:51:37 +02:00
Clifford Wolf
36009645ce Add LUT route-through pips to iCE40 architecture database 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-02 16:28:47 +02:00
David Shah
a7269a685e ice40: Use real cell timings 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-02 16:02:51 +02:00
David Shah
c0aaac8dfa ice40: Adding cell timings to chipdb 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-08-02 15:20:43 +02:00
Clifford Wolf
29dd98420b Remove getFrameDecal() API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-01 11:30:11 +02:00
David Shah
b1a9978922 Merge branch 'redist_slack' into 'master' 
Update budgets throughout placement and routing

See merge request SymbioticEDA/nextpnr!16
 2018-08-01 05:59:34 +00:00
Sergiusz Bazanski
85fc356fc1 clangformat 2018-08-01 03:59:27 +01:00
Eddie Hung
f646ec790a Modify the getNetinfo*() functions and getBudgetOverride() to not use 
user_idx and to take a PortRef& instead
 2018-07-31 19:31:54 -07:00
Eddie Hung
2d75053744 Merge remote-tracking branch 'origin/estdelay' into redist_slack 
Conflicts:
	ecp5/arch.cc
	generic/arch.cc
	ice40/arch.cc
 2018-07-31 16:18:08 -07:00
Eddie Hung
70747b9355 Merge branch 'redist_slack' into 'redist_slack' 
# Conflicts:
#   common/timing.cc
 2018-07-31 17:51:56 +00:00
Clifford Wolf
41726087b7 getChipName() should be const 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-31 17:01:38 +02:00
Clifford Wolf
32ff0059fe Add binary search to getBelPinWire() and getBelPinType() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-31 11:55:25 +02:00
Eddie Hung
a82f6f4105 Modify predictDelay signature 2018-07-30 21:51:30 -07:00
David Shah
b09183db3b Use DelayInfo for cell timing instead of delay_t 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-30 16:59:30 +02:00
Clifford Wolf
8f9b031ef0 Add iCE40 fast/slow delay fields to chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-30 16:21:20 +02:00
Clifford Wolf
0daffec2a0 Add predictDelay Arch API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-30 15:35:40 +02:00