William D. Jones
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086bca18b8
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machxo2: Add packing logic to handle FFs fed with constant value; UART test core routes.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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3ab300a28e
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machxo2: Add additional packing phase to pack remaining FFs.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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f18df5ed59
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machxo2: Don't write out config bits for cells without location info.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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da1b15d6f5
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machxo2: Special-case left and right I/O wire names in ASCII generation.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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8629d7b692
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machxo2: Add quickstart README.md.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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07bc6bac53
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machxo2: Fail CMake configuration is BUILD_PYTHON is ON (not supported for now).
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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c9487293e9
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machxo2: Fix REGMODE identifier (per slice, not per-FF).
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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d0b822c036
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machxo2: Add demo.sh TinyFPGA Ax example.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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0250aaaddd
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machxo2: clang format.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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2c9d4ba9ae
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machxo2: Fix reversed interpretation of REG_SD config bits.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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0d00c10e2f
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machxo2: Add bitstream generation for OSCH.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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884e7d9a98
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machxo2: Add basic bitstream generation for PIC tiles and I/O.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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d485dc6ef6
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machxo2: Add REGMODE to bitstream output.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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5415194b39
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machxo2: Checkpoint commit for slice bitstream generation.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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cf2db7a4c4
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machxo2: Write out pips to bitstream.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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56656b2b24
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machxo2: Emit empty bitstream file.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
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695fb7e569
|
machxo2: Add/fix copyright banners.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
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75f33e0c55
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machxo2: Add stub bitstream writer plus support files.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
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e1f72318e0
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machxo2: Tweak A-star parameters for acceptable performance.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
447b3a060c
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machxo2: Fix getWireName.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
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385917059b
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machxo2: Fix typos where absolute positions were treated as relative.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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722d1f2542
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machxo2: Finish implementing Wire API functions. nextpnr segfaults on example with constraints.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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861c12e6eb
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machxo2: Finish implementing Pip API functions.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
|
0adde4aede
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machxo2: Implement 4 more Wire/Pip API functions.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
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19a9554bda
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machxo2: Add stub getAttrs API functions.
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2021-02-12 10:36:59 +00:00 |
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William D. Jones
|
9a9054188c
|
machxo2: Implement getByName/getName for Wires and Pips.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
e4a6fd3571
|
machxo2: Convert facade_import to use pybind API from pytrellis.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
31ea8f8719
|
machxo2: Use attrmvcp in yosys to implement LOC constraint and only check for LOC on FACADE_IO.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
9c37aef499
|
machxo2: Detect LOC attributes during packing to implement rudimentary user constraints.
|
2021-02-12 10:36:59 +00:00 |
|
gatecat
|
8417470276
|
machxo2: Add clang-format exception to machxo2 binary blob C sources.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
0e63178fe1
|
machxo2: clang format.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
91ad064249
|
machxo2: Import remaining iterators from ECP5.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
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a7917c9c63
|
machxo2: Implement WireId/PipId, complete Bel part of API.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
bbc683dd75
|
machxo2: Implement all of Bel API except getBelPinWire.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
138519d820
|
machxo2: Fix place phase segfault. Placement suceeds with warning of no clock.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
8a94a3451f
|
machxo2: Stub valid BEL functions with comment. Place phase segfaults.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
5f748272fc
|
machxo2: Implement bel_to_cell and API functions using it.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
682de724a8
|
machxo2: Implement 2 Bel API functions.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
3e6be4bbfd
|
machxo2: Implement General Methods.
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2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
094233a4ab
|
machxo2: Implement getBelLocation to stop std::out_of_range in place phase.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
52b424c385
|
machxo2: Convert uint_t to int_t in packed structs.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
dc07054ee8
|
machxo2: Implement functions to get device utilization (throws std::out_of_range during place phase).
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
ec4a9685ab
|
machxo2: Initialize Arch context with device type and package.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
6f6aaa4a97
|
machxo2: Add binary blob struct definitions.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
a3a3a91b72
|
machxo2: Clean up packing pass a bit.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
c5292e0db5
|
machxo2: Finalize (hopefully) facade_import for prototype.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
3d287adbcf
|
machxo2: Add package/IO info to facade_import.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
b739513894
|
machxo2: Import constids and BELs into facade_import.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
dfedef5772
|
machxo2: Add pip and wire info into facade_import.
|
2021-02-12 10:36:59 +00:00 |
|
William D. Jones
|
e0b14ba98e
|
machxo2: Begin populating binary blob via facade_import.
|
2021-02-12 10:36:59 +00:00 |
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