Commit Graph

902 Commits

Author SHA1 Message Date
myrtle
b5125aac31
Merge pull request #1090 from rowanG077/ecp5-propagate-dcsc-clk-ct
ecp5: Propagate clock constraints through DCSC
2023-02-13 10:25:07 +01:00
rowanG077
9e8f8b7b45 streamline constant_net detection 2023-02-06 17:05:28 +01:00
Sylvain Munaut
582410629b ice40: Don't assert on unknown extra_config bits if they are 0
Bits are 0 by default anyway, so if they are unknown (because icestorm
is too od) but we want them at 0 ... it's not much of an issue.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2023-02-01 15:14:18 +01:00
Sylvain Munaut
49ae495344 ice40: Add support for PLL ICEGATE function
Technically you can enable it independently on CORE and GLOBAL
output, but this is not exposed in the classic primitive, so
we do the same as icecube2 and enable/disable it for both output
path depending on the argument

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2023-02-01 11:41:35 +01:00
Sylvain Munaut
f50d4c1ed1 ice40: Support for undriven / unconnected output ports
If a port specified as output (and thus had a $nextpnr_obuf inserted)
is undriven (const `z` or const `x`), we make sure to not enable
the output driver. Also enable pull-ups if it was requested by the user.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2023-01-29 22:35:19 +01:00
Sylvain Munaut
0cf5006e3b ice40: Rework pull-up attribute copy to SB_IO blocks
We try to copy the attribute only when there is a chance for
the output driver to not be active.

Note that this can _also_ happen when a port is specified as
output but has a TBUF, which the previous code wasn't handling.

We could copy the attribute "all-the-time" but this would
mean if a user specified a `-pullup yes` in the PCF for a
permanently driven output pin, we'd be burning power for
nothing.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2023-01-29 22:35:19 +01:00
Sean Anderson
df99b4ff6c ice40: Add debugs to isBelLocationValid for SB_IO
When there is a constraint conflict while placing IOs, the user gets an
error message such as

ERROR: Bel 'X0/Y27/io1' of type 'SB_IO' is not valid for cell 'my_pin' of type 'SB_IO'

While this identifies the problematic cell, it does not explain why
there is a problem. Add some verbose messages to allow users to
determine where the problem is. This can result in something like

Info: Net '$PACKER_VCC_NET' for cell 'my_pin' conflicts with net 'ce' for 'ce_pin'

which provides something actionable.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-12-07 10:32:38 +01:00
gatecat
603b60da8d api: add explain_invalid option to isBelLocationValid
Signed-off-by: gatecat <gatecat@ds0.me>
2022-12-07 10:27:58 +01:00
gatecat
e260ac33ab refactor: ArcBounds -> BoundingBox
Signed-off-by: gatecat <gatecat@ds0.me>
2022-12-07 10:00:53 +01:00
gatecat
c62a947a28 api: Make NetInfo* of checkPipAvailForNet const
Signed-off-by: gatecat <gatecat@ds0.me>
2022-12-02 14:20:39 +01:00
Tyler
613d84fb72
Correct Not Equal operator implementation in ice40
I noticed this during my work reimplementing nextpnr, and it seems to be dead and wrong, or at least dead. Either way I think this is what was intended unless anyone can correct me.
2022-10-17 01:19:51 -07:00
gatecat
a16d184956 ice40: Fix handling of carry out route-thru via 25,14
Signed-off-by: gatecat <gatecat@ds0.me>
2022-09-26 09:33:38 +02:00
gatecat
a920ffcf70 ice40: implement checkPipAvailForNet
Signed-off-by: gatecat <gatecat@ds0.me>
2022-09-20 14:15:10 +02:00
gatecat
0a8c411692 ice40: Fix UltraPlus BRAM clock polarity
Signed-off-by: gatecat <gatecat@ds0.me>
2022-09-14 09:24:49 +02:00
Adam Sampson
19160f10ae Use CMake's Python3 rather than PythonInterp in subdirs 2022-08-21 17:48:01 +01:00
gatecat
c60fb94b6c refactor: Use IdString::in instead of || chains
Signed-off-by: gatecat <gatecat@ds0.me>
2022-08-10 18:58:22 +01:00
gatecat
77c82b0fbf refactor: id(stringf(...)) to new idf(...) helper
Signed-off-by: gatecat <gatecat@ds0.me>
2022-08-10 10:57:46 +01:00
gatecat
6122f172e3 ice40: Fix accidental creation of empty ports
Signed-off-by: gatecat <gatecat@ds0.me>
2022-06-25 15:56:16 +01:00
gatecat
27966f101f ice40: Fix propagation of constraints through SB_GB
Signed-off-by: gatecat <gatecat@ds0.me>
2022-05-08 12:44:03 +01:00
gatecat
d3ba259db2 ice40: Avoid chain finder from mixing up chains by only allowing I3 chaining at end
Signed-off-by: gatecat <gatecat@ds0.me>
2022-04-11 18:46:44 +01:00
gatecat
92a58a2631 ci: Restructure and move entirely to GH actions from Cirrus
Signed-off-by: gatecat <gatecat@ds0.me>
2022-04-08 18:42:39 +01:00
gatecat
336124b879 ice40: Fix wirenames containing / which is the list separator
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-30 20:57:00 +01:00
gatecat
5a9ddc0675 ice40: Merge driving LUT<=2s into carry-only LCs
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-29 13:37:14 +01:00
gatecat
07c8506372 ice40: Improve error reporting for PLL conflicts
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-25 15:55:07 +00:00
gatecat
14d53dfec8 clangformat
Signed-off-by: gatecat <gatecat@ds0.me>
2022-03-17 19:24:05 +00:00
Stefan Riesenberger
e9ce55bfd0 ice40: fix crash when packing LUTs with no output 2022-03-14 12:43:19 +01:00
gatecat
86699b42f6 Switch to potentially-sparse net users array
This uses a new data structure for net.users that allows gaps, so
removing a port from a net is no longer an O(n) operation on the number
of users the net has.

Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-27 13:47:05 +00:00
gatecat
6a32aca4ac refactor: New member functions to replace design_utils
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-18 11:13:18 +00:00
gatecat
76683a1e3c refactor: Use constids instead of id("..")
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-16 17:09:54 +00:00
gatecat
9ef0bc3d3a refactor: Use cell member functions to add ports
Signed-off-by: gatecat <gatecat@ds0.me>
2022-02-16 16:45:45 +00:00
gatecat
30fd86ce69 refactor: New NetInfo and CellInfo constructors 2022-02-16 15:10:57 +00:00
gatecat
58a1b473b8
Merge pull request #873 from YosysHQ/gatecat/ice40-carry-lut
ice40: Pack LUT at start of carry chain if there is 1 candidate
2022-01-16 19:59:56 +00:00
gatecat
ddb084e9a8 archapi: Use arbitrary rather than actual placement in predictDelay
This makes predictDelay be based on an arbitrary belpin pair rather
than a arc of a net based on cell placement. This way 'what-if'
decisions can be evaluated without actually changing placement;
potentially useful for parallel placement.

A new helper predictArcDelay behaves like the old predictDelay to
minimise the impact on existing passes; only arches need be updated.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-19 17:15:15 +00:00
gatecat
a946ed0206 ice40: Pack LUT at start of carry chain if there is 1 candidate
Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-14 19:27:20 +00:00
gatecat
8f722a0d35 ice40: Use default value when IP is missing BUS_ADDR74 parameter
Signed-off-by: gatecat <gatecat@ds0.me>
2021-07-20 16:08:26 +01:00
gatecat
d290766101 ice40: Fix order of values in error
Signed-off-by: gatecat <gatecat@ds0.me>
2021-07-10 23:23:19 +01:00
gatecat
2ffb081442 Fixing old emails and names in copyrights
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-12 13:22:38 +01:00
gatecat
dcbb322447 Remove redundant code after hashlib move
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-02 15:05:20 +01:00
gatecat
eca1a4cee4 Use hashlib in most remaining code
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-02 15:05:20 +01:00
gatecat
ecc19c2c08 Using hashlib in arches
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-02 15:05:19 +01:00
gatecat
f4fed62c05 Use hashlib in routers
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-02 15:04:53 +01:00
gatecat
579b98c596 Use hashlib for core netlist structures
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-02 14:27:56 +01:00
gatecat
ff72454f83 Add hash() member functions
Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-02 14:27:56 +01:00
gatecat
6a3eacddd6 Add default base implementation of cluster API
Signed-off-by: gatecat <gatecat@ds0.me>
2021-05-06 11:47:06 +01:00
Keith Rothman
fe4608386e Split nextpnr.h to allow for linear inclusion.
"nextpnr.h" is no longer the god header.  Important improvements:

 - Functions in log.h can be used without including
   BaseCtx/Arch/Context. This means that log_X functions can be called
   without included "nextpnr.h"

 - NPNR_ASSERT can be used without including "nextpnr.h" by including
   "nextpnr_assertions.h".  This allows NPNR_ASSERT to be used safely in
   any header file.

 - Types defined in "archdefs.h" are now available without including
   BaseCtx/Arch/Context.  This means that utility classes that will be
   used inside of BaseCtx/Arch/Context can be defined safely in a
   self-contained header.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-03-15 09:05:23 -07:00
gatecat
7922b3bfc4 Replace DelayInfo with DelayPair/DelayQuad
This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.

This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.

While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-19 11:31:33 +00:00
gatecat
c7c13cd95f Remove isValidBelForCell
This Arch API dates from when we were first working out how to
implement placement validity checking, and in practice is little used by
the core parts of placer1/HeAP and the Arch implementation involves a
lot of duplication with isBelLocationValid.

In the short term; placement validity checking is better served by the
combination of checkBelAvail and isValidBelForCellType before placement;
followed by isBelLocationValid after placement (potentially after
moving/swapping multiple cells).

Longer term, removing this API makes things a bit cleaner for a new
validity checking API.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-16 13:31:36 +00:00
Keith Rothman
99e397000c Add getBelHidden and add some missing "override" statements.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2021-02-11 14:58:02 -08:00
gatecat
11db5a2f1d Add BaseArchRanges for default ArchRanges types
Signed-off-by: gatecat <gatecat@ds0.me>
2021-02-09 10:39:14 +00:00
gatecat
bcf81f0e71
Merge pull request #568 from YosysHQ/dave/arch-override
Create a new BaseArch that formally specifies the Arch API and provides some base implementations
2021-02-08 17:56:08 +00:00