Commit Graph

1769 Commits

Author SHA1 Message Date
Sylvain Munaut
ac5d767d4f ice40/pack: Stop looking for BEL when we have one during PLL placement
Ideally we should first process all the PLL that are constrained somehow
(either explicitely or because they are PAD) and then free place the rest.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
Sylvain Munaut
5fb3353557 ice40/pack: Allow PLL to be constrained via 'BEL' attributes
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
Sylvain Munaut
8c69a3bba3 ice40/pack: Make sure we don't use a LOCKED bel when placing PLL
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
Sylvain Munaut
b29165eeba ice40/arch: Add helper to check if a BEL is LOCKED or not
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 18:20:20 +01:00
Sylvain Munaut
70e1fe423f ice40/chipdb: Fix LOCKED keyword support to include all packages
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 13:12:43 +01:00
Sylvain Munaut
42fbb110fc ice40/bitstream: Handle IoCtrl.IE_ polarity when configuring unused SB_IO
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-19 13:12:43 +01:00
David Shah
76f575fb29 ecp5: Add support for LUT7 mux
Signed-off-by: David Shah <dave@ds0.me>
2018-11-18 17:17:46 +00:00
David Shah
458aa20161 ecp5: More optimal LUT6 placement
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 17:36:34 +00:00
David Shah
3ae8b86003 ecp5: Adding mux support up to LUT6
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 17:27:23 +00:00
David Shah
72b53016c0 timing: Improve crit path statistics
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 16:24:06 +00:00
David Shah
1851ebb1c6
Merge pull request #124 from smunaut/ice40_warn_sbio_misuse
ice40: Add warning if an instanciated SB_IO has its PACKAGE_PIN used elsewhere
2018-11-16 15:56:45 +00:00
Sylvain Munaut
e1e8d8cd14 ice40: Add warning if an instanciated SB_IO has its PACKAGE_PIN used elsewhere
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-16 16:36:57 +01:00
David Shah
af5c4d1b11
Merge pull request #123 from smunaut/ice40_fix_line_endings
ice40/bitstream: Convert to UNIX line endings
2018-11-16 15:28:35 +00:00
Sylvain Munaut
01950a2349 ice40/bitstream: Convert to UNIX line endings
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-11-16 16:24:56 +01:00
David Shah
94dc54f4fa ecp5: Add 10% safety margin to pip delays
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:35:01 +00:00
David Shah
1ae722272a ecp5: clangformat timing changes
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:27:03 +00:00
David Shah
50b85da619 ecp5: Use speed-grade-specific delay estimate
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
13244e513b ecp5: Fix db import, improve timing data debugging
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
19cc284b8c ecp5: Allow selection of device speed grade
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
ffe1166e33 ecp5: Post-rebase fix
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
2024346f4d ecp5: Consider fanout when calculating pip delays
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
cc746d888b ecp5: Fix timing pip classes
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
3ecd440748 ecp5: Use new timing data
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
703ff2818f ecp5: Fix timing data import
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
18813f2056 ecp5: Adding real timing data to database
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:26:28 +00:00
David Shah
9c52afcf5f clangformat
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:25:51 +00:00
David Shah
20aa0a0eed ice40: Remove unnecessary RAM assertion
Fixes #121

Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 13:18:53 +00:00
David Shah
cfaa6c0e5d
Merge pull request #119 from cr1901/win-fix
nextpnr-ecp5 Windows Fixes
2018-11-16 10:00:13 +00:00
David Shah
fe4f98f26f
Merge pull request #118 from daveshah1/dcu
Adding ECP5 DCU support
2018-11-16 09:58:34 +00:00
David Shah
f07bd98d59 ecp5: Better use of Boost
Signed-off-by: David Shah <dave@ds0.me>
2018-11-16 09:58:18 +00:00
David Shah
7e1df82462 ecp5: Regression fix & format
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:54:28 +00:00
David Shah
91a0927196 ecp5: Support LOC attribute on DCUs
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
01e0da16f0 ecp5: Add DCU availability check
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
02736d0680 ecp5: Add timing info for SERDES
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
084f9cf63f ecp5: DCU clocking fixes
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
0eba7d9789 ecp5: EXTREFB fixes
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
bc022173f0 ecp5: clangformat
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
36178a5713 ecp5: Trim IO connected to top level ports
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
e9fe444dc7 ecp5: Adding ancillary DCU bels
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
37cbabecfb ecp5: remove debug and clangformat
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
c9d83ec08b dcu: Fix bitstream param handling
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
4f8dfd8e1b ecp5: Prefer DCCs with dedicated routing when placing DCCs
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
c5a3571a06 ecp5: Working on DCU
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
983903887d ecp5: DCU bitstream gen handling
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
cc9fb1497d ecp5: Groundwork for DCU support
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:30:27 +00:00
David Shah
9472b6d78f
Merge pull request #103 from YosysHQ/timingapi
Timing constraints API, multiple clock domains
2018-11-15 11:26:08 +00:00
David Shah
9f9b242cf0 docs: Add documentation on constraints support
Signed-off-by: David Shah <dave@ds0.me>
2018-11-15 11:25:26 +00:00
Eddie Hung
e1d2c595a1 Improve message spacing 2018-11-14 18:27:43 -08:00
Eddie Hung
06ddb632d1 Merge remote-tracking branch 'origin/master' into timingapi 2018-11-14 17:59:21 -08:00
Eddie Hung
d3b2065cd7
Merge pull request #114 from YosysHQ/fix_legalise
Fix legalise
2018-11-14 17:58:16 -08:00